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author | Gabe Black <gblack@eecs.umich.edu> | 2009-01-06 22:46:28 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-01-06 22:46:28 -0800 |
commit | 8cab1805f9854d74b4a73c5c3b316aa7ad2d2177 (patch) | |
tree | 798104ee42fc5a92d5a740b779a03fd99e908dd8 /src/arch | |
parent | 9e24d8c599a3090f3ce59a608ff887ac434aa1ca (diff) | |
download | gem5-8cab1805f9854d74b4a73c5c3b316aa7ad2d2177.tar.xz |
X86: Move the function that prints memory args into the inst base class.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/insts/microldstop.cc | 29 | ||||
-rw-r--r-- | src/arch/x86/insts/static_inst.cc | 38 | ||||
-rw-r--r-- | src/arch/x86/insts/static_inst.hh | 3 |
3 files changed, 43 insertions, 27 deletions
diff --git a/src/arch/x86/insts/microldstop.cc b/src/arch/x86/insts/microldstop.cc index 9638a2ae3..7cc6a330f 100644 --- a/src/arch/x86/insts/microldstop.cc +++ b/src/arch/x86/insts/microldstop.cc @@ -64,7 +64,6 @@ namespace X86ISA const SymbolTable *symtab) const { std::stringstream response; - bool someAddr = false; printMnemonic(response, instMnem, mnemonic); if(flags[IsLoad]) @@ -72,32 +71,8 @@ namespace X86ISA else printSrcReg(response, 2, dataSize); response << ", "; - printSegment(response, segment); - response << ":["; - if(scale != 0 && _srcRegIdx[0] != ZeroReg) - { - if(scale != 1) - ccprintf(response, "%d*", scale); - printSrcReg(response, 0, addressSize); - someAddr = true; - } - if(_srcRegIdx[1] != ZeroReg) - { - if(someAddr) - response << " + "; - printSrcReg(response, 1, addressSize); - someAddr = true; - } - if(disp != 0) - { - if(someAddr) - response << " + "; - ccprintf(response, "%#x", disp); - someAddr = true; - } - if(!someAddr) - response << "0"; - response << "]"; + printMem(response, segment, scale, index, base, disp, + addressSize, false); return response.str(); } } diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc index 15fc4bee6..f4ed44603 100644 --- a/src/arch/x86/insts/static_inst.cc +++ b/src/arch/x86/insts/static_inst.cc @@ -240,6 +240,44 @@ namespace X86ISA } } + void X86StaticInst::printMem(std::ostream &os, uint8_t segment, + uint8_t scale, RegIndex index, RegIndex base, + uint64_t disp, uint8_t addressSize, bool rip) const + { + bool someAddr = false; + printSegment(os, segment); + os << ":["; + if (rip) { + os << "rip"; + someAddr = true; + } else { + if (scale != 0 && index != ZeroReg) + { + if(scale != 1) + ccprintf(os, "%d*", scale); + printReg(os, index, addressSize); + someAddr = true; + } + if (base != ZeroReg) + { + if(someAddr) + os << " + "; + printReg(os, base, addressSize); + someAddr = true; + } + } + if (disp != 0) + { + if(someAddr) + os << " + "; + ccprintf(os, "%#x", disp); + someAddr = true; + } + if (!someAddr) + os << "0"; + os << "]"; + } + std::string X86StaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const { diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh index e5c333e75..8480f2713 100644 --- a/src/arch/x86/insts/static_inst.hh +++ b/src/arch/x86/insts/static_inst.hh @@ -89,6 +89,9 @@ namespace X86ISA void printReg(std::ostream &os, int reg, int size) const; void printSrcReg(std::ostream &os, int reg, int size) const; void printDestReg(std::ostream &os, int reg, int size) const; + void printMem(std::ostream &os, uint8_t segment, + uint8_t scale, RegIndex index, RegIndex base, + uint64_t disp, uint8_t addressSize, bool rip) const; inline uint64_t merge(uint64_t into, uint64_t val, int size) const { |