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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-01 22:11:12 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-01 22:11:12 -0700 |
commit | 1f0c0a66881b9e45a5572fea9f780b90dc30a259 (patch) | |
tree | 9206ae52b863d06bd9ab6d803427ccfeef4ce673 /src/arch | |
parent | 065cb5942790b29886a443ef3f29b2b500231892 (diff) | |
download | gem5-1f0c0a66881b9e45a5572fea9f780b90dc30a259.tar.xz |
ARM: Recognize the IntRegs trace flag.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/arm/regfile/int_regfile.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm/regfile/int_regfile.hh b/src/arch/arm/regfile/int_regfile.hh index 938e68816..b22129f33 100644 --- a/src/arch/arm/regfile/int_regfile.hh +++ b/src/arch/arm/regfile/int_regfile.hh @@ -34,6 +34,7 @@ #include "arch/arm/isa_traits.hh" #include "arch/arm/types.hh" #include "base/misc.hh" +#include "base/trace.hh" #include "sim/faults.hh" #include "sim/serialize.hh" @@ -84,6 +85,8 @@ namespace ArmISA public: IntReg readReg(int intReg) { + DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", + intReg, regs[intReg]); return regs[intReg]; } @@ -94,6 +97,7 @@ namespace ArmISA Fault setReg(int intReg, const IntReg &val) { + DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", intReg, val); regs[intReg] = val; return NoFault; } |