syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.

8 files changed, 7 insertions, 8 deletions

diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index d37a769ea..ab3af0a1d 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -155,6 +155,7 @@ const int FramePointerReg = 15;
 const int SyscallNumReg = 0;
 const int FirstArgumentReg = 16;
 const int SyscallPseudoReturnReg = 20;
+const int SyscallSuccessReg = 19;
 
 const int LogVMPageSize = 13;       // 8K bytes
 const int VMPageSize = (1 << LogVMPageSize);
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 9c6e62815..093d83d8a 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -42,8 +42,6 @@
 using namespace AlphaISA;
 using namespace std;
 
-static const int SyscallSuccessReg = 19;
-
 AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params,
                                    ObjectFile *objFile)
     : LiveProcess(params, objFile)
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 59c2c00a2..fb46890c1 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -188,6 +188,10 @@ namespace MipsISA
     // semantically meaningful register indices
     const int ZeroReg = 0;
     const int AssemblerReg = 1;
+    const int SyscallSuccessReg = 7;
+    const int FirstArgumentReg = 4;
+    const int ReturnValueReg = 2;
+
     const int KernelReg0 = 26;
     const int KernelReg1 = 27;
     const int GlobalPointerReg = 28;
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index 784ddfe33..3e9fb7c20 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -40,10 +40,6 @@
 using namespace std;
 using namespace MipsISA;
 
-static const int SyscallSuccessReg = 7;
-static const int FirstArgumentReg = 4;
-static const int ReturnValueReg = 2;
-
 MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
         ObjectFile *objFile)
     : LiveProcess(params, objFile)
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 501f2f990..9833057a2 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -69,6 +69,7 @@ namespace SparcISA
     const int ZeroReg = 0;      // architecturally meaningful
     // the rest of these depend on the ABI
     const int ReturnAddressReg = 31; // post call, precall is 15
+    const int ReturnValueReg = 8;  // Post return, 24 is pre-return.
     const int StackPointerReg = 14;
     const int FramePointerReg = 30;
 
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index b2b539816..533e385b3 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -47,7 +47,6 @@ using namespace std;
 using namespace SparcISA;
 
 static const int FirstArgumentReg = 8;
-static const int ReturnValueReg = 8;
 
 
 SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index d25e0eb70..09241c310 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -106,6 +106,7 @@ namespace X86ISA
     const int StackPointerReg = INTREG_RSP;
     //X86 doesn't seem to have a link register
     const int ReturnAddressReg = 0;
+    const int ReturnValueReg = INTREG_RAX;
     const int FramePointerReg = INTREG_RBP;
 
     // Some OS syscalls use a second register (rdx) to return a second
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 4a61ed168..43dd4a591 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -104,7 +104,6 @@
 using namespace std;
 using namespace X86ISA;
 
-static const int ReturnValueReg = INTREG_RAX;
 static const int ArgumentReg[] = {
     INTREG_RDI,
     INTREG_RSI,