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author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-22 14:30:56 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-22 14:30:56 -0700 |
commit | 421aea980f7cbc9495b9df36b6b4e76dc323d971 (patch) | |
tree | 2eff46f9a682b8dc7f36fef5d287bb8163dffb0b /src/arch | |
parent | 93da9eb7f6d9b2ca84de74afd3e0cb07188db9e6 (diff) | |
download | gem5-421aea980f7cbc9495b9df36b6b4e76dc323d971.tar.xz |
X86: Implement the cda microop which checks if an address is legal to write to.
--HG--
extra : convert_revision : afe20649180dd59ad0702b98f7293be6c9226359
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/isa/microops/ldstop.isa | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index c9ace4790..61adde8d1 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -445,5 +445,27 @@ let {{ self.mnemonic = "lea" microopClasses["lea"] = LeaOp + + + iop = InstObjParams("cda", "Cda", 'X86ISA::LdStOp', + {"code": ''' + Addr paddr; + fault = xc->translateDataWriteAddr(EA, paddr, + dataSize, (1 << segment)); + ''', + "ea_code": calculateEA}) + header_output += MicroLeaDeclare.subst(iop) + decoder_output += MicroLdStOpConstructor.subst(iop) + exec_output += MicroLeaExecute.subst(iop) + + class CdaOp(LdStOp): + def __init__(self, segment, addr, disp = 0, + dataSize="env.dataSize", addressSize="env.addressSize"): + super(CdaOp, self).__init__("NUM_INTREGS", segment, + addr, disp, dataSize, addressSize) + self.className = "Cda" + self.mnemonic = "cda" + + microopClasses["cda"] = CdaOp }}; |