diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-18 22:42:53 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-18 22:42:53 -0700 |
commit | 5c32422162f11f11ac68cb5ba39bf5d48dce010d (patch) | |
tree | f60f7870d3fd21bebe021cea8f62293ffa1961bf /src/arch | |
parent | f0dce3bfce72a1a8514aa22e04ea6e06253a985f (diff) | |
download | gem5-5c32422162f11f11ac68cb5ba39bf5d48dce010d.tar.xz |
X86: Implement the string IO instructions, ins and outs.
--HG--
extra : convert_revision : b021e70390d289b22a8e693cd8a99d6e7bd7d2b4
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/isa/decoder/one_byte_opcodes.isa | 8 | ||||
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/input_output/string_io.py | 96 |
2 files changed, 77 insertions, 27 deletions
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 473dd1eeb..9723b1d60 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -209,10 +209,10 @@ 0x1: IMUL(Gv,Ev,Iz); 0x2: PUSH(Ib); 0x3: IMUL(Gv,Ev,Ib); - 0x4: WarnUnimpl::ins_Yb_Dx(); - 0x5: WarnUnimpl::ins_Yz_Dx(); - 0x6: WarnUnimpl::outs_Dx_Xb(); - 0x7: WarnUnimpl::outs_Dx_Xz(); + 0x4: StringInst::INS(Yb,rD); + 0x5: StringInst::INS(Yz,rD); + 0x6: StringInst::OUTS(rD,Xb); + 0x7: StringInst::OUTS(rD,Xz); } 0x0E: decode OPCODE_OP_BOTTOM3 { 0x0: JO(Jb); diff --git a/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py b/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py index a35ba772f..a8acbbc39 100644 --- a/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py +++ b/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py @@ -53,26 +53,76 @@ # # Authors: Gabe Black -microcode = "" -#let {{ -# class INS(Inst): -# "GenFault ${new UnimpInstFault}" -# class INSB(Inst): -# "GenFault ${new UnimpInstFault}" -# class INSW(Inst): -# "GenFault ${new UnimpInstFault}" -# class INSD(Inst): -# "GenFault ${new UnimpInstFault}" -# class INSQ(Inst): -# "GenFault ${new UnimpInstFault}" -# class OUTS(Inst): -# "GenFault ${new UnimpInstFault}" -# class OUTSB(Inst): -# "GenFault ${new UnimpInstFault}" -# class OUTSW(Inst): -# "GenFault ${new UnimpInstFault}" -# class OUTSD(Inst): -# "GenFault ${new UnimpInstFault}" -# class OUTSQ(Inst): -# "GenFault ${new UnimpInstFault}" -#}}; +microcode = ''' +def macroop INS_M_R { + # Find the constant we need to either add or subtract from rdi + ruflag t0, 10 + movi t3, t3, dsz, flags=(CEZF,), dataSize=asz + subi t4, t0, dsz, dataSize=asz + mov t3, t3, t4, flags=(nCEZF,), dataSize=asz + + limm t1, "IntAddrPrefixIO" + zext t2, reg, 16, dataSize=2 + + ld t6, intseg, [1, t1, t2], addressSize=8 + st t6, es, [1, t0, rdi] + + add rdi, rdi, t3, dataSize=asz +}; + +def macroop INS_E_M_R { + # Find the constant we need to either add or subtract from rdi + ruflag t0, 10 + movi t3, t3, dsz, flags=(CEZF,), dataSize=asz + subi t4, t0, dsz, dataSize=asz + mov t3, t3, t4, flags=(nCEZF,), dataSize=asz + + limm t1, "IntAddrPrefixIO" + zext t2, reg, 16, dataSize=2 + +topOfLoop: + ld t6, intseg, [1, t1, t2], addressSize=8 + st t6, es, [1, t0, rdi] + + subi rcx, rcx, 1, flags=(EZF,), dataSize=asz + add rdi, rdi, t3, dataSize=asz + bri t0, label("topOfLoop"), flags=(nCEZF,) + fault "NoFault" +}; + +def macroop OUTS_R_M { + # Find the constant we need to either add or subtract from rdi + ruflag t0, 10 + movi t3, t3, dsz, flags=(CEZF,), dataSize=asz + subi t4, t0, dsz, dataSize=asz + mov t3, t3, t4, flags=(nCEZF,), dataSize=asz + + limm t1, "IntAddrPrefixIO" + zext t2, reg, 16, dataSize=2 + + ld t6, ds, [1, t0, rsi] + st t6, intseg, [1, t1, t2], addressSize=8 + + add rsi, rsi, t3, dataSize=asz +}; + +def macroop OUTS_E_R_M { + # Find the constant we need to either add or subtract from rdi + ruflag t0, 10 + movi t3, t3, dsz, flags=(CEZF,), dataSize=asz + subi t4, t0, dsz, dataSize=asz + mov t3, t3, t4, flags=(nCEZF,), dataSize=asz + + limm t1, "IntAddrPrefixIO" + zext t2, reg, 16, dataSize=2 + +topOfLoop: + ld t6, ds, [1, t0, rsi] + st t6, intseg, [1, t1, t2], addressSize=8 + + subi rcx, rcx, 1, flags=(EZF,), dataSize=asz + add rsi, rsi, t3, dataSize=asz + bri t0, label("topOfLoop"), flags=(nCEZF,) + fault "NoFault" +}; +''' |