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author | Ali Saidi <saidi@eecs.umich.edu> | 2009-02-26 19:29:17 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2009-02-26 19:29:17 -0500 |
commit | 6fd4bc34a154601ba0a74e41875094c20076e091 (patch) | |
tree | 21b2a60589d1c509e0c2386a1ebc8385a6e8349d /src/arch | |
parent | d5ef9ee06b4e8be52069b46a65af3a0a7e0a9817 (diff) | |
download | gem5-6fd4bc34a154601ba0a74e41875094c20076e091.tar.xz |
CPA: Add new object for gathering critical path annotations.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/alpha/isa/decoder.isa | 59 | ||||
-rw-r--r-- | src/arch/alpha/isa/main.isa | 1 |
2 files changed, 57 insertions, 3 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index 67bc5c7a2..0b2a31410 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -870,9 +870,62 @@ decode OPCODE default Unknown::unknown() { 0x54: m5panic({{ panic("M5 panic instruction called at pc=%#x.", xc->readPC()); }}, IsNonSpeculative); - 0x55: m5reserved1({{ - warn("M5 reserved opcode ignored"); - }}, IsNonSpeculative); +#define CPANN(lbl) CPA::cpa()->lbl(xc->tcBase()) + 0x55: decode RA { + 0x00: m5a_old({{ + panic("Deprecated M5 annotate instruction executed at pc=%#x\n", + xc->readPC()); + }}, IsNonSpeculative); + 0x01: m5a_bsm({{ + CPANN(swSmBegin); + }}, IsNonSpeculative); + 0x02: m5a_esm({{ + CPANN(swSmEnd); + }}, IsNonSpeculative); + 0x03: m5a_begin({{ + CPANN(swExplictBegin); + }}, IsNonSpeculative); + 0x04: m5a_end({{ + CPANN(swEnd); + }}, IsNonSpeculative); + 0x06: m5a_q({{ + CPANN(swQ); + }}, IsNonSpeculative); + 0x07: m5a_dq({{ + CPANN(swDq); + }}, IsNonSpeculative); + 0x08: m5a_wf({{ + CPANN(swWf); + }}, IsNonSpeculative); + 0x09: m5a_we({{ + CPANN(swWe); + }}, IsNonSpeculative); + 0x0C: m5a_sq({{ + CPANN(swSq); + }}, IsNonSpeculative); + 0x0D: m5a_aq({{ + CPANN(swAq); + }}, IsNonSpeculative); + 0x0E: m5a_pq({{ + CPANN(swPq); + }}, IsNonSpeculative); + 0x0F: m5a_l({{ + CPANN(swLink); + }}, IsNonSpeculative); + 0x10: m5a_identify({{ + CPANN(swIdentify); + }}, IsNonSpeculative); + 0x11: m5a_getid({{ + R0 = CPANN(swGetId); + }}, IsNonSpeculative); + 0x13: m5a_scl({{ + CPANN(swSyscallLink); + }}, IsNonSpeculative); + 0x14: m5a_rq({{ + CPANN(swRq); + }}, IsNonSpeculative); + } // M5 Annotate Operations +#undef CPANN 0x56: m5reserved2({{ warn("M5 reserved opcode ignored"); }}, IsNonSpeculative); diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa index f34bd4b33..aea44976c 100644 --- a/src/arch/alpha/isa/main.isa +++ b/src/arch/alpha/isa/main.isa @@ -68,6 +68,7 @@ using namespace AlphaISA; output exec {{ #include <math.h> +#include "base/cp_annotate.hh" #include "sim/pseudo_inst.hh" #include "arch/alpha/ipr.hh" #include "base/fenv.hh" |