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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 23:05:22 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 23:05:22 -0700
commite3004c579fcd7c3f34dfcbd90169c5aa9218a65b (patch)
treeb936d53aaef92a4dea7e47625f9e22d1771de0ce /src/arch
parent349a155b6e38c128f155b1c83d9f11e73f6e8673 (diff)
downloadgem5-e3004c579fcd7c3f34dfcbd90169c5aa9218a65b.tar.xz
X86: Fix the segment setting code in IRET, and make it restore the flags.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
index 125866ce5..57bc13698 100644
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
@@ -190,8 +190,8 @@ processSSDescriptor:
# This actually updates state which is wrong. It should wait until we know
# we're not going to fault. Unfortunately, that's hard to do.
- wrdl cs, t7, t2
- wrsel cs, t2
+ wrdl ss, t7, t2
+ wrsel ss, t2
###
### From this point downwards, we can't fault. We can update user visible state.
@@ -224,6 +224,7 @@ skipSegmentSquashing:
# Ignore this for now.
#RFLAGS.v = temp_RFLAGS
+ wrflags t0, t3
# VIF,VIP,IOPL only changed if (old_CPL = 0)
# IF only changed if (old_CPL <= old_RFLAGS.IOPL)
# VM unchanged