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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:34 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:34 -0800
commita1aba01a02a8c1261120de83d8fbfd6624f0cb17 (patch)
tree9d5e0abec98c0879b03a4d34d0862731424408f5 /src/arch
parentf3090e5b704a2b7a02a736ec8601cd961fe3a865 (diff)
downloadgem5-a1aba01a02a8c1261120de83d8fbfd6624f0cb17.tar.xz
CPU: Get rid of translate... functions from various interface classes.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa13
1 files changed, 1 insertions, 12 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 8a0af14be..cdebe9613 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -454,7 +454,7 @@ let {{
Mem = Data;
Base = merge(Base, EA - SegBase, addressSize);
''');
-
+ defineMicroStoreOp('Cda', 'Mem = 0;', "Request::NO_ACCESS")
iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp',
{"code": "Data = merge(Data, EA, dataSize);",
@@ -493,17 +493,6 @@ let {{
microopClasses["tia"] = TiaOp
- iop = InstObjParams("cda", "Cda", 'X86ISA::LdStOp',
- {"code": '''
- Addr paddr;
- fault = xc->translateDataWriteAddr(EA, paddr,
- dataSize, (1 << segment));
- ''',
- "ea_code": calculateEA})
- header_output += MicroLeaDeclare.subst(iop)
- decoder_output += MicroLdStOpConstructor.subst(iop)
- exec_output += MicroLeaExecute.subst(iop)
-
class CdaOp(LdStOp):
def __init__(self, segment, addr, disp = 0,
dataSize="env.dataSize", addressSize="env.addressSize"):