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author | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-23 09:51:12 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-23 09:51:12 -0400 |
commit | b48ed9b6c2a8a8aa8eb2182acc77239cc8a3358d (patch) | |
tree | cb34a1417433bae6ddb7eb8a42cbb949ea4f6b19 /src/arch | |
parent | fa32ad4941a80c85513b57a2fa43acb84212e5df (diff) | |
download | gem5-b48ed9b6c2a8a8aa8eb2182acc77239cc8a3358d.tar.xz |
x86: Add missing explicit overrides for X86 devices
Make clang >= 3.5 happy when compiling build/X86/gem5.opt on OSX.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/x86/interrupts.hh | 16 | ||||
-rw-r--r-- | src/arch/x86/tlb.hh | 8 |
2 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh index b1bdbf10f..26699b01e 100644 --- a/src/arch/x86/interrupts.hh +++ b/src/arch/x86/interrupts.hh @@ -212,15 +212,15 @@ class Interrupts : public BasicPioDevice, IntDevice /* * Initialize this object by registering it with the IO APIC. */ - void init(); + void init() override; /* * Functions to interact with the interrupt port from IntDevice. */ - Tick read(PacketPtr pkt); - Tick write(PacketPtr pkt); - Tick recvMessage(PacketPtr pkt); - Tick recvResponse(PacketPtr pkt); + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; + Tick recvMessage(PacketPtr pkt) override; + Tick recvResponse(PacketPtr pkt) override; bool triggerTimerInterrupt() @@ -231,10 +231,10 @@ class Interrupts : public BasicPioDevice, IntDevice return entry.periodic; } - AddrRangeList getIntAddrRange() const; + AddrRangeList getIntAddrRange() const override; BaseMasterPort &getMasterPort(const std::string &if_name, - PortID idx = InvalidPortID) + PortID idx = InvalidPortID) override { if (if_name == "int_master") { return intMasterPort; @@ -243,7 +243,7 @@ class Interrupts : public BasicPioDevice, IntDevice } BaseSlavePort &getSlavePort(const std::string &if_name, - PortID idx = InvalidPortID) + PortID idx = InvalidPortID) override { if (if_name == "int_slave") { return intSlavePort; diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 6e3eb2eee..53f61dcbc 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -74,7 +74,7 @@ namespace X86ISA typedef X86TLBParams Params; TLB(const Params *p); - void takeOverFrom(BaseTLB *otlb) {} + void takeOverFrom(BaseTLB *otlb) override {} TlbEntry *lookup(Addr va, bool update_lru = true); @@ -89,11 +89,11 @@ namespace X86ISA public: Walker *getWalker(); - void flushAll(); + void flushAll() override; void flushNonGlobal(); - void demapPage(Addr va, uint64_t asn); + void demapPage(Addr va, uint64_t asn) override; protected: uint32_t size; @@ -161,7 +161,7 @@ namespace X86ISA * * @return A pointer to the walker master port */ - virtual BaseMasterPort *getMasterPort(); + BaseMasterPort *getMasterPort() override; }; } |