arch: Add a virtual asBytes function to the StaticInst class.

This function takes a pointer to a buffer and the current size of the
buffer as a pass by reference argument. If the size of the buffer is
sufficient, the function stores a binary representation of itself
(generally the ISA defined instruction encoding) in the buffer, and
sets the size argument to how much space it used. This could be used
by ISAs which have two instruction sizes (ARM and thumb, for example).
If the buffer size isn't sufficient, then the size parameter should be
set to what size is required, and then the function should return
without modifying the buffer.

The buffer itself should be aligned to the same standard as memory
returned by new, specifically "The pointer returned shall be suitably
aligned so that it can be converted to a pointer of any complete object
type and then used to access the object or array in the storage
allocated...". This will avoid having to memcpy buffers to avoid
unaligned accesses.

To standardize the representation of the data, it should be stored in
the buffer as little endian. Since most hosts (including ARM and x86
hosts) will be little endian, this will almost always be a no-op.

Change-Id: I2f31aa0b4f9c0126b44f47a881c2901243279bd6
Reviewed-on: https://gem5-review.googlesource.com/7562
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

6 files changed, 40 insertions, 2 deletions

diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index a23710a2d..4f269b373 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -51,6 +51,8 @@ output header {{
 #include "cpu/static_inst.hh"
 #include "mem/packet.hh"
 #include "mem/request.hh"  // some constructors use MemReq flags
+#include "sim/byteswap.hh"
+
 }};
 
 output decoder {{
@@ -59,9 +61,9 @@ output decoder {{
 #include "arch/alpha/decoder.hh"
 #include "arch/alpha/registers.hh"
 #include "arch/alpha/regredir.hh"
-#include "base/loader/symtab.hh"
 #include "base/cprintf.hh"
 #include "base/fenv.hh"
+#include "base/loader/symtab.hh"
 #include "config/ss_compatible_fp.hh"
 #include "cpu/thread_context.hh"  // for Jump::branchTarget()
 #include "mem/packet.hh"
@@ -219,7 +221,6 @@ output header {{
     class AlphaStaticInst : public StaticInst
     {
       protected:
-
         /// Constructor.
         AlphaStaticInst(const char *mnem, ExtMachInst _machInst,
                         OpClass __opClass)
@@ -239,6 +240,13 @@ output header {{
         {
             pcState.advance();
         }
+
+      public:
+        size_t
+        asBytes(void *buf, size_t max_size) override
+        {
+            return simpleAsBytes(buf, max_size, machInst);
+        }
     };
 }};
 
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh
index c68880c97..3ed374ab1 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -505,6 +505,12 @@ class ArmStaticInst : public StaticInst
     {
         return static_cast<MachInst>(machInst & (mask(instSize() * 8)));
     }
+
+    size_t
+    asBytes(void *buf, size_t max_size) override
+    {
+        return simpleAsBytes(buf, max_size, machInst);
+    }
 };
 }
 
diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index 946dce6df..3759390d1 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -63,6 +63,12 @@ output header {{
         {
             pc.advance();
         }
+
+        size_t
+        asBytes(void *buf, size_t max_size) override
+        {
+            return simpleAsBytes(buf, max_size, machInst);
+        }
     };
 
 }};
diff --git a/src/arch/power/insts/static_inst.hh b/src/arch/power/insts/static_inst.hh
index b7a818a2c..f4f1bec7b 100644
--- a/src/arch/power/insts/static_inst.hh
+++ b/src/arch/power/insts/static_inst.hh
@@ -69,6 +69,12 @@ class PowerStaticInst : public StaticInst
     {
         pcState.advance();
     }
+
+    size_t
+    asBytes(void *buf, size_t max_size) override
+    {
+        return simpleAsBytes(buf, max_size, machInst);
+    }
 };
 
 } // namespace PowerISA
diff --git a/src/arch/riscv/insts/static_inst.hh b/src/arch/riscv/insts/static_inst.hh
index 073b60c1c..3f6d58654 100644
--- a/src/arch/riscv/insts/static_inst.hh
+++ b/src/arch/riscv/insts/static_inst.hh
@@ -56,6 +56,12 @@ class RiscvStaticInst : public StaticInst
 
   public:
     void advancePC(PCState &pc) const { pc.advance(); }
+
+    size_t
+    asBytes(void *buf, size_t size) override
+    {
+        return simpleAsBytes(buf, size, machInst);
+    }
 };
 
 /**
diff --git a/src/arch/sparc/insts/static_inst.hh b/src/arch/sparc/insts/static_inst.hh
index cc5a60225..9e15c8dab 100644
--- a/src/arch/sparc/insts/static_inst.hh
+++ b/src/arch/sparc/insts/static_inst.hh
@@ -105,6 +105,12 @@ class SparcStaticInst : public StaticInst
 
     static bool passesFpCondition(uint32_t fcc, uint32_t condition);
     static bool passesCondition(uint32_t codes, uint32_t condition);
+
+    size_t
+    asBytes(void *buf, size_t size) override
+    {
+        return simpleAsBytes(buf, size, machInst);
+    }
 };
 
 }