ISA: Make the decode function part of the ISA's decoder.

27 files changed, 299 insertions, 87 deletions

diff --git a/src/arch/alpha/SConscript b/src/arch/alpha/SConscript
index 7e683364a..421040bb5 100644
--- a/src/arch/alpha/SConscript
+++ b/src/arch/alpha/SConscript
@@ -32,6 +32,7 @@
 Import('*')
 
 if env['TARGET_ISA'] == 'alpha':
+    Source('decoder.cc')
     Source('ev5.cc')
     Source('faults.cc')
     Source('freebsd/system.cc')
diff --git a/src/arch/generic/decoder.cc b/src/arch/alpha/decoder.cc
index 46ad0cf95..8cabe515d 100644
--- a/src/arch/generic/decoder.cc
+++ b/src/arch/alpha/decoder.cc
@@ -28,11 +28,11 @@
  * Authors: Gabe Black
  */
 
-#include "arch/generic/decoder.hh"
+#include "arch/alpha/decoder.hh"
 
-namespace GenericISA
+namespace AlphaISA
 {
 
-DecodeCache<TheISA::decodeInst> Decoder::defaultCache;
+DecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/alpha/decoder.hh b/src/arch/alpha/decoder.hh
index 77a165ad7..a41ed06bb 100644
--- a/src/arch/alpha/decoder.hh
+++ b/src/arch/alpha/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_ALPHA_DECODER_HH__
 #define __ARCH_ALPHA_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace AlphaISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace AlphaISA
 
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index 5285d0572..1bc00e753 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -56,6 +56,7 @@ output header {{
 output decoder {{
 #include <cmath>
 
+#include "arch/alpha/decoder.hh"
 #include "arch/alpha/registers.hh"
 #include "arch/alpha/regredir.hh"
 #include "base/loader/symtab.hh"
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 171c04718..0f94455bd 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -47,6 +47,7 @@ if env['TARGET_ISA'] == 'arm':
 # Workaround for bug in SCons version > 0.97d20071212
 # Scons bug id: 2006 M5 Bug id: 308 
     Dir('isa/formats')
+    Source('decoder.cc')
     Source('faults.cc')
     Source('insts/macromem.cc')
     Source('insts/mem.cc')
diff --git a/src/arch/generic/decoder.hh b/src/arch/arm/decoder.cc
index fb880d54d..be46ff540 100644
--- a/src/arch/generic/decoder.hh
+++ b/src/arch/arm/decoder.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2012 Google
+ * Copyright (c) 2011 Google
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -28,37 +28,11 @@
  * Authors: Gabe Black
  */
 
-#ifndef __ARCH_GENERIC_DECODER_HH__
-#define __ARCH_GENERIC_DECODER_HH__
+#include "arch/arm/decoder.hh"
 
-#include "arch/isa_traits.hh"
-#include "arch/types.hh"
-#include "config/the_isa.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst.hh"
-
-namespace GenericISA
-{
-
-/// The decoder class. This class doesn't do much of anything now, but in the
-/// future it will be redefinable per ISA and allow more interesting behavior.
-class Decoder
+namespace ArmISA
 {
-  protected:
-    /// A cache of decoded instruction objects.
-    static DecodeCache<TheISA::decodeInst> defaultCache;
-
-  public:
-    /// Decode a machine instruction.
-    /// @param mach_inst The binary instruction to decode.
-    /// @retval A pointer to the corresponding StaticInst object.
-    StaticInstPtr
-    decode(TheISA::ExtMachInst mach_inst, Addr addr)
-    {
-        return defaultCache.decode(mach_inst, addr);
-    }
-};
 
-} // namespace GenericISA
+DecodeCache Decoder::defaultCache;
 
-#endif // __ARCH_GENERIC_DECODER_HH__
+}
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 5525b4a89..a91d70f48 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_ARM_DECODER_HH__
 #define __ARCH_ARM_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace ArmISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace ArmISA
 
diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa
index 607a5c8b8..5dd13d623 100644
--- a/src/arch/arm/isa/includes.isa
+++ b/src/arch/arm/isa/includes.isa
@@ -63,6 +63,7 @@ output header {{
 }};
 
 output decoder {{
+#include "arch/arm/decoder.hh"
 #include "arch/arm/faults.hh"
 #include "arch/arm/intregs.hh"
 #include "arch/arm/isa_traits.hh"
diff --git a/src/arch/generic/SConscript b/src/arch/generic/SConscript
deleted file mode 100644
index 70795e3b2..000000000
--- a/src/arch/generic/SConscript
+++ /dev/null
@@ -1,31 +0,0 @@
-# Copyright (c) 2012 Google
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Gabe Black
-
-Import('*')
-
-Source('decoder.cc')
diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py
index c0cdebe11..1b0d46410 100755
--- a/src/arch/isa_parser.py
+++ b/src/arch/isa_parser.py
@@ -1218,7 +1218,7 @@ class ISAParser(Grammar):
         # wrap the decode block as a function definition
         t[4].wrap_decode_block('''
 StaticInstPtr
-%(isa_name)s::decodeInst(%(isa_name)s::ExtMachInst machInst)
+%(isa_name)s::Decoder::decodeInst(%(isa_name)s::ExtMachInst machInst)
 {
     using namespace %(namespace)s;
 ''' % vars(), '}')
diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript
index 7e2d4b806..15b4ffc51 100644
--- a/src/arch/mips/SConscript
+++ b/src/arch/mips/SConscript
@@ -34,6 +34,7 @@ Import('*')
 
 if env['TARGET_ISA'] == 'mips':
     Source('bare_iron/system.cc')
+    Source('decoder.cc')
     Source('dsp.cc')
     Source('faults.cc')
     Source('idle_event.cc')
diff --git a/src/arch/mips/decoder.cc b/src/arch/mips/decoder.cc
new file mode 100644
index 000000000..45b1f7184
--- /dev/null
+++ b/src/arch/mips/decoder.cc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2012 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/mips/decoder.hh"
+
+namespace MipsISA
+{
+
+DecodeCache Decoder::defaultCache;
+
+}
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 071b188ae..f5940daad 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_MIPS_DECODER_HH__
 #define __ARCH_MIPS_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace MipsISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace MipsISA
 
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index ac9945b09..f8c86a71a 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -47,6 +47,7 @@ output header {{
 output decoder {{
 #include <cmath>
 
+#include "arch/mips/decoder.hh"
 #include "arch/mips/dsp.hh"
 #include "arch/mips/dt_constants.hh"
 #include "arch/mips/faults.hh"
diff --git a/src/arch/power/SConscript b/src/arch/power/SConscript
index 7f893ca37..a9d20b4bd 100644
--- a/src/arch/power/SConscript
+++ b/src/arch/power/SConscript
@@ -34,6 +34,7 @@ if env['TARGET_ISA'] == 'power':
 # Workaround for bug in SCons version > 0.97d20071212
 # Scons bug id: 2006 M5 Bug id: 308 
     Dir('isa/formats')
+    Source('decoder.cc')
     Source('insts/branch.cc')
     Source('insts/mem.cc')
     Source('insts/integer.cc')
diff --git a/src/arch/power/decoder.cc b/src/arch/power/decoder.cc
new file mode 100644
index 000000000..96fd9297b
--- /dev/null
+++ b/src/arch/power/decoder.cc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2011 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/power/decoder.hh"
+
+namespace PowerISA
+{
+
+DecodeCache Decoder::defaultCache;
+
+}
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index 8fd8bed1a..34537bb56 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_POWER_DECODER_HH__
 #define __ARCH_POWER_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace PowerISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace PowerISA
 
diff --git a/src/arch/power/isa/includes.isa b/src/arch/power/isa/includes.isa
index ed2076d62..7d062292f 100644
--- a/src/arch/power/isa/includes.isa
+++ b/src/arch/power/isa/includes.isa
@@ -58,6 +58,7 @@ output decoder {{
 #include <fenv.h>
 #endif
 
+#include "arch/power/decoder.hh"
 #include "arch/power/faults.hh"
 #include "arch/power/isa_traits.hh"
 #include "arch/power/utility.hh"
diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index 75a3590e7..5e2146750 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -33,6 +33,7 @@ Import('*')
 
 if env['TARGET_ISA'] == 'sparc':
     Source('asi.cc')
+    Source('decoder.cc')
     Source('faults.cc')
     Source('interrupts.cc')
     Source('isa.cc')
diff --git a/src/arch/sparc/decoder.cc b/src/arch/sparc/decoder.cc
new file mode 100644
index 000000000..e8769a573
--- /dev/null
+++ b/src/arch/sparc/decoder.cc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2011 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/sparc/decoder.hh"
+
+namespace SparcISA
+{
+
+DecodeCache Decoder::defaultCache;
+
+}
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 0386bd095..9c8e740b8 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_SPARC_DECODER_HH__
 #define __ARCH_SPARC_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace SparcISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace SparcISA
 
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 541254d51..79c90a50e 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -51,6 +51,7 @@ output header {{
 output decoder {{
 #include <algorithm>
 
+#include "arch/sparc/decoder.hh"
 #include "base/loader/symtab.hh"
 #include "base/cprintf.hh"
 #include "base/fenv.hh"
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index 3bd968e21..27b12fe20 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -44,6 +44,7 @@ Import('*')
 
 if env['TARGET_ISA'] == 'x86':
     Source('cpuid.cc')
+    Source('decoder.cc')
     Source('emulenv.cc')
     Source('faults.cc')
     Source('insts/badmicroop.cc')
diff --git a/src/arch/x86/decoder.cc b/src/arch/x86/decoder.cc
new file mode 100644
index 000000000..469858301
--- /dev/null
+++ b/src/arch/x86/decoder.cc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2011 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/decoder.hh"
+
+namespace X86ISA
+{
+
+DecodeCache Decoder::defaultCache;
+
+}
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 6c8c122f8..769284adb 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -31,13 +31,31 @@
 #ifndef __ARCH_X86_DECODER_HH__
 #define __ARCH_X86_DECODER_HH__
 
-#include "arch/generic/decoder.hh"
+#include "arch/types.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
 
 namespace X86ISA
 {
 
-class Decoder : public GenericISA::Decoder
-{};
+class Decoder
+{
+  protected:
+    /// A cache of decoded instruction objects.
+    static DecodeCache defaultCache;
+
+  public:
+    StaticInstPtr decodeInst(ExtMachInst mach_inst);
+
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr
+    decode(ExtMachInst mach_inst, Addr addr)
+    {
+        return defaultCache.decode(this, mach_inst, addr);
+    }
+};
 
 } // namespace X86ISA
 
diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa
index 127b8b5fb..eda2ebceb 100644
--- a/src/arch/x86/isa/includes.isa
+++ b/src/arch/x86/isa/includes.isa
@@ -73,6 +73,7 @@ using X86ISA::InstRegIndex;
 }};
 
 output decoder {{
+#include "arch/x86/decoder.hh"
 #include "arch/x86/regs/float.hh"
 #include "arch/x86/regs/misc.hh"
 #include "arch/x86/regs/segment.hh"
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 34c5b5ebc..383e56eee 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -43,7 +43,6 @@
 #include "arch/x86/types.hh"
 #include "arch/x86/x86_traits.hh"
 #include "base/types.hh"
-#include "cpu/static_inst_fwd.hh"
 
 namespace LittleEndianGuest {}
 
@@ -69,8 +68,6 @@ namespace X86ISA
 
     const int BranchPredAddrShiftAmt = 0;
 
-    StaticInstPtr decodeInst(ExtMachInst);
-
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;