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authorGabe Black <gblack@eecs.umich.edu>2006-11-06 18:30:28 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-11-06 18:30:28 -0500
commitef1a92eb9b372ffadb7985941797ba37b61beac5 (patch)
treeef8a1bc4775c6d2d44460582ccca5eed95d55f84 /src/arch
parent85a6079db7c2e7146dc437c9c032d2aa56dd9048 (diff)
downloadgem5-ef1a92eb9b372ffadb7985941797ba37b61beac5.tar.xz
Stub for SPARC interrupt handling object.
--HG-- extra : convert_revision : 7257e3387c01e84e5a1018a9cdcc09a79edfa934
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/sparc/interrupts.hh92
1 files changed, 92 insertions, 0 deletions
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
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+++ b/src/arch/sparc/interrupts.hh
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+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_SPARC_INTERRUPT_HH__
+#define __ARCH_SPARC_INTERRUPT_HH__
+
+#include "arch/sparc/faults.hh"
+
+namespace SparcISA
+{
+ class Interrupts
+ {
+ protected:
+ Fault interrupts[NumInterruptLevels];
+ bool requested[NumInterruptLevels];
+
+ public:
+ Interrupts()
+ {
+ for(int x = 0; x < NumInterruptLevels; x++)
+ {
+ interrupts[x] = new InterruptLevelN(x);
+ requested[x] = false;
+ }
+ }
+ void post(int int_num, int index)
+ {
+ if(int_num < 0 || int_num >= NumInterruptLevels)
+ panic("int_num out of bounds\n");
+
+ requested[int_num] = true;
+ }
+
+ void clear(int int_num, int index)
+ {
+ requested[int_num] = false;
+ }
+
+ void clear_all()
+ {
+ for(int x = 0; x < NumInterruptLevels; x++)
+ requested[x] = false;
+ }
+
+ bool check_interrupts(ThreadContext * tc) const
+ {
+ return true;
+ }
+
+ Fault getInterrupt(ThreadContext * tc)
+ {
+ return NoFault;
+ }
+
+ void serialize(std::ostream &os)
+ {
+ }
+
+ void unserialize(Checkpoint *cp, const std::string &section)
+ {
+ }
+ };
+}
+
+#endif // __ARCH_SPARC_INTERRUPT_HH__