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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-29 16:07:22 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-29 16:07:22 -0400 |
| commit | 02f3b21c4249973d00298e6a84006f0ccfa46569 (patch) | |
| tree | b17757d13d7033cf063c1ec8e1f89d738c07dd05 /src/arch | |
| parent | 9231d2235df1a6ec8f439ff5c61de0e49c522c73 (diff) | |
| download | gem5-02f3b21c4249973d00298e6a84006f0ccfa46569.tar.xz | |
Set both xcc.c and icc.c on return from a syscall.
--HG--
extra : convert_revision : 9c2b32d735b816021cdd3af24002f309e22a8d64
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/sparc/syscallreturn.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/syscallreturn.hh b/src/arch/sparc/syscallreturn.hh index d850f4b65..75a063da1 100644 --- a/src/arch/sparc/syscallreturn.hh +++ b/src/arch/sparc/syscallreturn.hh @@ -79,11 +79,11 @@ namespace SparcISA // and put the return value itself in the standard return value reg (). if (return_value.successful()) { // no error, clear XCC.C - regs->setMiscReg(MISCREG_CCR, regs->readMiscReg(MISCREG_CCR) & 0xEF); + regs->setMiscReg(MISCREG_CCR, regs->readMiscReg(MISCREG_CCR) & 0xEE); regs->setIntReg(ReturnValueReg, return_value.value()); } else { // got an error, set XCC.C - regs->setMiscReg(MISCREG_CCR, regs->readMiscReg(MISCREG_CCR) | 0x10); + regs->setMiscReg(MISCREG_CCR, regs->readMiscReg(MISCREG_CCR) | 0x11); regs->setIntReg(ReturnValueReg, return_value.value()); } } |