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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-11-28 04:35:55 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-11-28 04:35:55 -0500 |
| commit | 87b66c9ae3a27021135979f491e650f7be6d20a7 (patch) | |
| tree | ba3af8bca11452252a4c32975f2466cabcb5a9f2 /src/arch | |
| parent | 64ccfecf9579abbe553ed1825dcaead9a3daa34f (diff) | |
| download | gem5-87b66c9ae3a27021135979f491e650f7be6d20a7.tar.xz | |
SPARC: Minor style fix.
I forgot to fix this as well per Ali's feedback.
--HG--
extra : rebase_source : e70d031cb5f91e2212a1a73ea1769bf0549b826c
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/sparc/isa/formats/basic.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa index 47c9cbd0d..915e34564 100644 --- a/src/arch/sparc/isa/formats/basic.isa +++ b/src/arch/sparc/isa/formats/basic.isa @@ -168,7 +168,7 @@ def format BasicOperate(code, *flags) {{ def format FpBasic(code, *flags) {{ exec_code = """ - Fsr |= bits(Fsr,4,0) << 5; + Fsr |= bits(Fsr, 4, 0) << 5; Fsr = insertBits(Fsr, 4, 0, 0); int newrnd = M5_FE_TONEAREST; switch (Fsr<31:30>) { |