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authorGabe Black <gblack@eecs.umich.edu>2007-08-26 20:41:36 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-26 20:41:36 -0700
commit8d1c7a83d7c052ba312a21ff6c6b8967b1e4b5f4 (patch)
tree9a99719e6532d29101d747ccbe8fc02fbc78cc4a /src/arch
parentac5ec1542e92d0e27b0aa1a156b15ca7b00cc693 (diff)
downloadgem5-8d1c7a83d7c052ba312a21ff6c6b8967b1e4b5f4.tar.xz
X86: Make the Ruflag microop work correctly, and make the code a little clearer.
--HG-- extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microops/regop.isa6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index b91c77c21..616f7a5fc 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -652,10 +652,10 @@ let {{
defineMicroRegOpRd('Rdip', 'DestReg = RIP')
defineMicroRegOpRd('Ruflags', 'DestReg = ccFlagBits')
defineMicroRegOpRdImm('Ruflag', '''
- int flag = bits(ccFlagBits, (1 << imm8) + 0*psrc1);
+ int flag = bits(ccFlagBits, imm8 + 0*psrc1);
DestReg = merge(DestReg, flag, dataSize);
- ccFlagBits = ccFlagBits & ~EZFBit;
- ccFlagBits = ccFlagBits | ((flag == 0) ? EZFBit : 0);
+ ccFlagBits = (flag == 0) ? (ccFlagBits | EZFBit) :
+ (ccFlagBits & ~EZFBit);
''')
defineMicroRegOpImm('Sext', '''