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authorVince Weaver <vince@csl.cornell.edu>2009-11-11 17:49:09 -0500
committerVince Weaver <vince@csl.cornell.edu>2009-11-11 17:49:09 -0500
commit8f6744c19c7d6cf87a207e901503c3435c1ff7a9 (patch)
treea557f896130cfd9c14dc271b7169bd58dcd54f8a /src/arch
parent5524af83efab8ee502f84987d56306ecd140ab80 (diff)
downloadgem5-8f6744c19c7d6cf87a207e901503c3435c1ff7a9.tar.xz
X86: add ULL to 1's being shifted in 64-bit values
Some of the micro-ops weren't casting 1 to ULL before shifting, which can cause problems. On the perl makerand input this caused some values to be negative that shouldn't have been. The casts are done as ULL(1) instead of 1ULL to match others in the m5 code base.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microops/mediaop.isa31
-rw-r--r--src/arch/x86/isa/microops/regop.isa4
2 files changed, 18 insertions, 17 deletions
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index fa32583b0..4052f254d 100644
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -452,7 +452,7 @@ let {{
if (signBit) {
if (overflow != mask(destBits - srcBits + 1)) {
if (ext & 0x1)
- picked = (1 << (destBits - 1));
+ picked = (ULL(1) << (destBits - 1));
else
picked = 0;
}
@@ -480,7 +480,7 @@ let {{
if (signBit) {
if (overflow != mask(destBits - srcBits + 1)) {
if (ext & 0x1)
- picked = (1 << (destBits - 1));
+ picked = (ULL(1) << (destBits - 1));
else
picked = 0;
}
@@ -642,10 +642,10 @@ let {{
int loIndex = (i + 0) * sizeBits;
uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex);
int64_t arg1 = arg1Bits |
- (0 - (arg1Bits & (1 << (sizeBits - 1))));
+ (0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex);
int64_t arg2 = arg2Bits |
- (0 - (arg2Bits & (1 << (sizeBits - 1))));
+ (0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
uint64_t resBits;
if (ext & 0x2) {
@@ -680,10 +680,10 @@ let {{
int loIndex = (i + 0) * sizeBits;
uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex);
int64_t arg1 = arg1Bits |
- (0 - (arg1Bits & (1 << (sizeBits - 1))));
+ (0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex);
int64_t arg2 = arg2Bits |
- (0 - (arg2Bits & (1 << (sizeBits - 1))));
+ (0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
uint64_t resBits;
if (ext & 0x2) {
@@ -957,7 +957,7 @@ let {{
int resSign = bits(resBits, sizeBits - 1);
if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) {
if (resSign == 0)
- resBits = (1 << (sizeBits - 1));
+ resBits = (ULL(1) << (sizeBits - 1));
else
resBits = mask(sizeBits - 1);
}
@@ -996,7 +996,7 @@ let {{
int resSign = bits(resBits, sizeBits - 1);
if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) {
if (resSign == 0)
- resBits = (1 << (sizeBits - 1));
+ resBits = (ULL(1) << (sizeBits - 1));
else
resBits = mask(sizeBits - 1);
}
@@ -1032,16 +1032,16 @@ let {{
if (ext & 0x2) {
int64_t arg1 = arg1Bits |
- (0 - (arg1Bits & (1 << (srcBits - 1))));
+ (0 - (arg1Bits & (ULL(1) << (srcBits - 1))));
int64_t arg2 = arg2Bits |
- (0 - (arg2Bits & (1 << (srcBits - 1))));
+ (0 - (arg2Bits & (ULL(1) << (srcBits - 1))));
resBits = (uint64_t)(arg1 * arg2);
} else {
resBits = arg1Bits * arg2Bits;
}
if (ext & 0x4)
- resBits += (1 << (destBits - 1));
+ resBits += (ULL(1) << (destBits - 1));
if (ext & 0x8)
resBits >>= destBits;
@@ -1142,7 +1142,7 @@ let {{
} else {
resBits = (arg1Bits >> shiftAmt);
resBits = resBits |
- (0 - (resBits & (1 << (sizeBits - 1 - shiftAmt))));
+ (0 - (resBits & (ULL(1) << (sizeBits - 1 - shiftAmt))));
}
result = insertBits(result, hiIndex, loIndex, resBits);
@@ -1289,7 +1289,8 @@ let {{
int srcHiIndex = srcStart + (i + 1) * srcSizeBits - 1;
int srcLoIndex = srcStart + (i + 0) * srcSizeBits;
uint64_t argBits = bits(FpSrcReg1.uqw, srcHiIndex, srcLoIndex);
- int64_t sArg = argBits | (0 - (argBits & (1 << srcHiIndex)));
+
+ int64_t sArg = argBits | (0 - (argBits & (ULL(1) << srcHiIndex)));
double arg = sArg;
if (destSize == 4) {
@@ -1400,10 +1401,10 @@ let {{
int loIndex = (i + 0) * sizeBits;
uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex);
int64_t arg1 = arg1Bits |
- (0 - (arg1Bits & (1 << (sizeBits - 1))));
+ (0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex);
int64_t arg2 = arg2Bits |
- (0 - (arg2Bits & (1 << (sizeBits - 1))));
+ (0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
uint64_t resBits = 0;
if (((ext & 0x2) == 0 && arg1 == arg2) ||
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index fd1ad6925..0b1f9a96a 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -525,7 +525,7 @@ let {{
code = '''
ProdLow = psrc1 * op2;
int halfSize = (dataSize * 8) / 2;
- uint64_t shifter = (1ULL << halfSize);
+ uint64_t shifter = (ULL(1) << halfSize);
uint64_t hiResult;
uint64_t psrc1_h = psrc1 / shifter;
uint64_t psrc1_l = psrc1 & mask(halfSize);
@@ -553,7 +553,7 @@ let {{
code = '''
ProdLow = psrc1 * op2;
int halfSize = (dataSize * 8) / 2;
- uint64_t shifter = (1ULL << halfSize);
+ uint64_t shifter = (ULL(1) << halfSize);
uint64_t psrc1_h = psrc1 / shifter;
uint64_t psrc1_l = psrc1 & mask(halfSize);
uint64_t psrc2_h = (op2 / shifter) & mask(halfSize);