summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-11-08 22:49:58 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-11-08 22:49:58 -0800
commitbbbfdee2ed4feb5e8e448920e5d51701a2192ee1 (patch)
tree4da65b9782070931315466e16f8020ac2dc79aa1 /src/arch
parent44e912c6bd8828a6a3774c1fa54a1f4689383243 (diff)
downloadgem5-bbbfdee2ed4feb5e8e448920e5d51701a2192ee1.tar.xz
X86: Don't panic on faults on prefetches in SE mode.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/tlb.cc26
1 files changed, 15 insertions, 11 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 0d69d05c9..d7959da2c 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -637,17 +637,21 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation,
success = p->pTable->lookup(vaddr, newEntry);
}
if (!success) {
- const char *modeStr = "";
- if (mode == Execute)
- modeStr = "execute";
- else if (mode == Read)
- modeStr = "read";
- else if (mode == Write)
- modeStr = "write";
- else
- modeStr = "?";
- panic("Tried to %s unmapped address %#x.\n",
- modeStr, vaddr);
+ if (req->isPrefetch()) {
+ return new PageFault(vaddr, true, mode, true, false);
+ } else {
+ const char *modeStr = "";
+ if (mode == Execute)
+ modeStr = "execute";
+ else if (mode == Read)
+ modeStr = "read";
+ else if (mode == Write)
+ modeStr = "write";
+ else
+ modeStr = "?";
+ panic("Tried to %s unmapped address %#x.\n",
+ modeStr, vaddr);
+ }
} else {
Addr alignedVaddr = p->pTable->pageAlign(vaddr);
DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,