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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-13 15:03:34 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-13 15:03:34 -0400 |
| commit | ff90b8c1aa99711eeb55c5eba29519f77cbc041c (patch) | |
| tree | 625d8574e483b01552f9d819321807ea4c9853ed /src/arch | |
| parent | 0d0e18a0653f321c90ced826682a98d14bba9045 (diff) | |
| parent | a068d6db0fff7056abb06bb8a99494b63bd169e1 (diff) | |
| download | gem5-ff90b8c1aa99711eeb55c5eba29519f77cbc041c.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/sparc/miscregfile.cc | 8 | ||||
| -rw-r--r-- | src/arch/sparc/ua2005.cc | 17 |
2 files changed, 14 insertions, 11 deletions
diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc index ac30afde9..5bd572d38 100644 --- a/src/arch/sparc/miscregfile.cc +++ b/src/arch/sparc/miscregfile.cc @@ -231,14 +231,6 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg) return hintp; case MISCREG_HTBA: return htba; - case MISCREG_HVER: - // XXX set to match Legion - return ULL(0x3e) << 48 | - ULL(0x23) << 32 | - ULL(0x20) << 24 | - //MaxGL << 16 | XXX For some reason legion doesn't set GL - MaxTL << 8 | - (NWindows -1) << 0; case MISCREG_STRAND_STS_REG: return strandStatusReg; case MISCREG_HSTICK_CMPR: diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index 439f38457..48e97a531 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -195,6 +195,7 @@ MiscRegFile::setFSReg(int miscReg, const MiscReg &val, ThreadContext *tc) panic("No support for setting spec_en bit\n"); setRegNoEffect(miscReg, bits(val,0,0)); if (!bits(val,0,0)) { + DPRINTF(Quiesce, "Cpu executed quiescing instruction\n"); // Time to go to sleep tc->suspend(); if (tc->getKernelStats()) @@ -235,7 +236,13 @@ MiscRegFile::readFSReg(int miscReg, ThreadContext * tc) case MISCREG_HTBA: return readRegNoEffect(miscReg) & ULL(~0x7FFF); case MISCREG_HVER: - return NWindows | MaxTL << 8 | MaxGL << 16; + // XXX set to match Legion + return ULL(0x3e) << 48 | + ULL(0x23) << 32 | + ULL(0x20) << 24 | + //MaxGL << 16 | XXX For some reason legion doesn't set GL + MaxTL << 8 | + (NWindows -1) << 0; case MISCREG_STRAND_STS_REG: System *sys; @@ -301,7 +308,7 @@ MiscRegFile::processSTickCompare(ThreadContext *tc) tc->getCpuPtr()->instCount(); assert(ticks >= 0 && "stick compare missed interrupt cycle"); - if (ticks == 0) { + if (ticks == 0 || tc->status() == ThreadContext::Suspended) { DPRINTF(Timer, "STick compare cycle reached at %#x\n", (stick_cmpr & mask(63))); if (!(tc->readMiscRegNoEffect(MISCREG_STICK_CMPR) & (ULL(1) << 63))) { @@ -318,11 +325,15 @@ MiscRegFile::processHSTickCompare(ThreadContext *tc) // we're actually at the correct cycle or we need to wait a little while // more int ticks; + if ( tc->status() == ThreadContext::Halted || + tc->status() == ThreadContext::Unallocated) + return; + ticks = ((int64_t)(hstick_cmpr & mask(63)) - (int64_t)stick) - tc->getCpuPtr()->instCount(); assert(ticks >= 0 && "hstick compare missed interrupt cycle"); - if (ticks == 0) { + if (ticks == 0 || tc->status() == ThreadContext::Suspended) { DPRINTF(Timer, "HSTick compare cycle reached at %#x\n", (stick_cmpr & mask(63))); if (!(tc->readMiscRegNoEffect(MISCREG_HSTICK_CMPR) & (ULL(1) << 63))) { |