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authorPalle Lyckegaard <palle@lyckegaard.dk>2015-09-15 08:14:07 -0500
committerPalle Lyckegaard <palle@lyckegaard.dk>2015-09-15 08:14:07 -0500
commit3de9def6c1ad38d6a5068b07512cbefffafcb758 (patch)
tree5c9c6fd65e43ce3e83c6683d38e2a441587a6666 /src/arch
parent58ec70444d9cfa50c7405d76a04cda5f9a43e1a1 (diff)
downloadgem5-3de9def6c1ad38d6a5068b07512cbefffafcb758.tar.xz
sparc: writing to tick_cmpr should not cause a panic
This register is writable according to UA2005 Tried to boot NetBSD which starts the kernel by writing to the tick_cmpr register. Without the patch gem5 crashes with a panic. With the patch NetBSD starts to boot normally (although sun4v support in NetBSD is not complete yet) Committed by: Nilay Vaish <nilay@cs.wisc.edu>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/sparc/ua2005.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index d3708d861..b207f2fac 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -116,7 +116,7 @@ ISA::setFSReg(int miscReg, const MiscReg &val, ThreadContext *tc)
cpu->deschedule(tickCompare);
cpu->schedule(tickCompare, cpu->clockEdge(Cycles(time)));
}
- panic("writing to TICK compare register %#X\n", val);
+ DPRINTF(Timer, "writing to TICK compare register value %#X\n", val);
break;
case MISCREG_STICK_CMPR: