sim: Refactor the serialization base class

Objects that are can be serialized are supposed to inherit from the
Serializable class. This class is meant to provide a unified API for
such objects. However, so far it has mainly been used by SimObjects
due to some fundamental design limitations. This changeset redesigns
to the serialization interface to make it more generic and hide the
underlying checkpoint storage. Specifically:

  * Add a set of APIs to serialize into a subsection of the current
    object. Previously, objects that needed this functionality would
    use ad-hoc solutions using nameOut() and section name
    generation. In the new world, an object that implements the
    interface has the methods serializeSection() and
    unserializeSection() that serialize into a named /subsection/ of
    the current object. Calling serialize() serializes an object into
    the current section.

  * Move the name() method from Serializable to SimObject as it is no
    longer needed for serialization. The fully qualified section name
    is generated by the main serialization code on the fly as objects
    serialize sub-objects.

  * Add a scoped ScopedCheckpointSection helper class. Some objects
    need to serialize data structures, that are not deriving from
    Serializable, into subsections. Previously, this was done using
    nameOut() and manual section name generation. To simplify this,
    this changeset introduces a ScopedCheckpointSection() helper
    class. When this class is instantiated, it adds a new /subsection/
    and subsequent serialization calls during the lifetime of this
    helper class happen inside this section (or a subsection in case
    of nested sections).

  * The serialize() call is now const which prevents accidental state
    manipulation during serialization. Objects that rely on modifying
    state can use the serializeOld() call instead. The default
    implementation simply calls serialize(). Note: The old-style calls
    need to be explicitly called using the
    serializeOld()/serializeSectionOld() style APIs. These are used by
    default when serializing SimObjects.

  * Both the input and output checkpoints now use their own named
    types. This hides underlying checkpoint implementation from
    objects that need checkpointing and makes it easier to change the
    underlying checkpoint storage code.

52 files changed, 247 insertions, 258 deletions

diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index 3e9c90381..1e67f54b5 100644
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -121,14 +121,14 @@ class Interrupts : public SimObject
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const
     {
         SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
         SERIALIZE_SCALAR(intstatus);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp)
     {
         UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
         UNSERIALIZE_SCALAR(intstatus);
diff --git a/src/arch/alpha/isa.cc b/src/arch/alpha/isa.cc
index 20f039166..8240037cc 100644
--- a/src/arch/alpha/isa.cc
+++ b/src/arch/alpha/isa.cc
@@ -53,7 +53,7 @@ ISA::params() const
 }
 
 void
-ISA::serialize(std::ostream &os)
+ISA::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(fpcr);
     SERIALIZE_SCALAR(uniq);
@@ -63,7 +63,7 @@ ISA::serialize(std::ostream &os)
 }
 
 void
-ISA::unserialize(Checkpoint *cp, const std::string &section)
+ISA::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(fpcr);
     UNSERIALIZE_SCALAR(uniq);
diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh
index 52e4e98be..6a88ee40b 100644
--- a/src/arch/alpha/isa.hh
+++ b/src/arch/alpha/isa.hh
@@ -92,8 +92,8 @@ namespace AlphaISA
             memset(ipr, 0, sizeof(ipr));
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+        void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
         int
         flattenIntIndex(int reg) const
diff --git a/src/arch/alpha/kernel_stats.cc b/src/arch/alpha/kernel_stats.cc
index bac5d26cd..94142a031 100644
--- a/src/arch/alpha/kernel_stats.cc
+++ b/src/arch/alpha/kernel_stats.cc
@@ -194,9 +194,9 @@ Statistics::callpal(int code, ThreadContext *tc)
 }
 
 void
-Statistics::serialize(ostream &os)
+Statistics::serialize(CheckpointOut &cp) const
 {
-    ::Kernel::Statistics::serialize(os);
+    ::Kernel::Statistics::serialize(cp);
     int exemode = themode;
     SERIALIZE_SCALAR(exemode);
     SERIALIZE_SCALAR(idleProcess);
@@ -204,9 +204,9 @@ Statistics::serialize(ostream &os)
 }
 
 void
-Statistics::unserialize(Checkpoint *cp, const string &section)
+Statistics::unserialize(CheckpointIn &cp)
 {
-    ::Kernel::Statistics::unserialize(cp, section);
+    ::Kernel::Statistics::unserialize(cp);
     int exemode;
     UNSERIALIZE_SCALAR(exemode);
     UNSERIALIZE_SCALAR(idleProcess);
diff --git a/src/arch/alpha/kernel_stats.hh b/src/arch/alpha/kernel_stats.hh
index 837269309..188d3ec4b 100644
--- a/src/arch/alpha/kernel_stats.hh
+++ b/src/arch/alpha/kernel_stats.hh
@@ -86,8 +86,8 @@ class Statistics : public ::Kernel::Statistics
     void setIdleProcess(Addr idle, ThreadContext *tc);
 
   public:
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 };
 
 } // namespace Kernel
diff --git a/src/arch/alpha/pagetable.cc b/src/arch/alpha/pagetable.cc
index 4dff04777..f2b1147f7 100644
--- a/src/arch/alpha/pagetable.cc
+++ b/src/arch/alpha/pagetable.cc
@@ -34,7 +34,7 @@
 namespace AlphaISA {
 
 void
-TlbEntry::serialize(std::ostream &os)
+TlbEntry::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(tag);
     SERIALIZE_SCALAR(ppn);
@@ -48,7 +48,7 @@ TlbEntry::serialize(std::ostream &os)
 }
 
 void
-TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
+TlbEntry::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(tag);
     UNSERIALIZE_SCALAR(ppn);
diff --git a/src/arch/alpha/pagetable.hh b/src/arch/alpha/pagetable.hh
index ca44de7fa..0b6524043 100644
--- a/src/arch/alpha/pagetable.hh
+++ b/src/arch/alpha/pagetable.hh
@@ -90,7 +90,7 @@ struct PageTableEntry
 };
 
 // ITB/DTB table entry
-struct TlbEntry
+struct TlbEntry : public Serializable
 {
     Addr tag;               // virtual page number tag
     Addr ppn;               // physical page number
@@ -124,7 +124,10 @@ struct TlbEntry
     }
 
     TlbEntry()
-    {}
+        : tag(0), ppn(0), xre(0), xwe(0), asn(0),
+          asma(false), fonr(0), fonw(0), valid(0)
+    {
+    }
 
     void
     updateVaddr(Addr new_vaddr)
@@ -139,8 +142,8 @@ struct TlbEntry
         return ppn << PageShift;
     }
 
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 };
 
 } // namespace AlphaISA
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index f50131be0..e214c8874 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -175,7 +175,7 @@ AlphaLiveProcess::setupASNReg()
 
 
 void
-AlphaLiveProcess::loadState(Checkpoint *cp)
+AlphaLiveProcess::loadState(CheckpointIn &cp)
 {
     LiveProcess::loadState(cp);
     // need to set up ASN after unserialization since M5_pid value may
diff --git a/src/arch/alpha/process.hh b/src/arch/alpha/process.hh
index d3f9fdfc3..6701017e0 100644
--- a/src/arch/alpha/process.hh
+++ b/src/arch/alpha/process.hh
@@ -42,7 +42,7 @@ class AlphaLiveProcess : public LiveProcess
   protected:
     AlphaLiveProcess(LiveProcessParams *params, ObjectFile *objFile);
 
-    void loadState(Checkpoint *cp);
+    void loadState(CheckpointIn &cp) M5_ATTR_OVERRIDE;
     void initState();
 
     void argsInit(int intSize, int pageSize);
diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc
index 3ebc02b64..d2be5492f 100644
--- a/src/arch/alpha/system.cc
+++ b/src/arch/alpha/system.cc
@@ -218,17 +218,17 @@ AlphaSystem::setAlphaAccess(Addr access)
 }
 
 void
-AlphaSystem::serializeSymtab(std::ostream &os)
+AlphaSystem::serializeSymtab(CheckpointOut &cp) const
 {
-    consoleSymtab->serialize("console_symtab", os);
-    palSymtab->serialize("pal_symtab", os);
+    consoleSymtab->serialize("console_symtab", cp);
+    palSymtab->serialize("pal_symtab", cp);
 }
 
 void
-AlphaSystem::unserializeSymtab(Checkpoint *cp, const std::string &section)
+AlphaSystem::unserializeSymtab(CheckpointIn &cp)
 {
-    consoleSymtab->unserialize("console_symtab", cp, section);
-    palSymtab->unserialize("pal_symtab", cp, section);
+    consoleSymtab->unserialize("console_symtab", cp);
+    palSymtab->unserialize("pal_symtab", cp);
 }
 
 AlphaSystem *
diff --git a/src/arch/alpha/system.hh b/src/arch/alpha/system.hh
index 11a5e90a4..3f4a2367e 100644
--- a/src/arch/alpha/system.hh
+++ b/src/arch/alpha/system.hh
@@ -60,8 +60,8 @@ class AlphaSystem : public System
     /**
      * Serialization stuff
      */
-    virtual void serializeSymtab(std::ostream &os);
-    virtual void unserializeSymtab(Checkpoint *cp, const std::string &section);
+    void serializeSymtab(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserializeSymtab(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     /** Override startup() to provide a path to call setupFuncEvents()
      */
diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index a740da388..5f0ed85db 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -30,13 +30,15 @@
  *          Andrew Schultz
  */
 
+#include "arch/alpha/tlb.hh"
+
+#include <algorithm>
 #include <memory>
 #include <string>
 #include <vector>
 
 #include "arch/alpha/faults.hh"
 #include "arch/alpha/pagetable.hh"
-#include "arch/alpha/tlb.hh"
 #include "arch/generic/debugfaults.hh"
 #include "base/inifile.hh"
 #include "base/str.hh"
@@ -62,17 +64,13 @@ bool uncacheBit40 = false;
 #define MODE2MASK(X) (1 << (X))
 
 TLB::TLB(const Params *p)
-    : BaseTLB(p), size(p->size), nlu(0)
+    : BaseTLB(p), table(p->size), nlu(0)
 {
-    table = new TlbEntry[size];
-    memset(table, 0, sizeof(TlbEntry) * size);
     flushCache();
 }
 
 TLB::~TLB()
 {
-    if (table)
-        delete [] table;
 }
 
 void
@@ -283,7 +281,7 @@ void
 TLB::flushAll()
 {
     DPRINTF(TLB, "flushAll\n");
-    memset(table, 0, sizeof(TlbEntry) * size);
+    std::fill(table.begin(), table.end(), TlbEntry());
     flushCache();
     lookupTable.clear();
     nlu = 0;
@@ -345,25 +343,26 @@ TLB::flushAddr(Addr addr, uint8_t asn)
 
 
 void
-TLB::serialize(ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
+    const unsigned size(table.size());
     SERIALIZE_SCALAR(size);
     SERIALIZE_SCALAR(nlu);
 
-    for (int i = 0; i < size; i++) {
-        nameOut(os, csprintf("%s.Entry%d", name(), i));
-        table[i].serialize(os);
-    }
+    for (int i = 0; i < size; i++)
+        table[i].serializeSection(cp, csprintf("Entry%d", i));
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
+    unsigned size(0);
     UNSERIALIZE_SCALAR(size);
     UNSERIALIZE_SCALAR(nlu);
 
+    table.resize(size);
     for (int i = 0; i < size; i++) {
-        table[i].unserialize(cp, csprintf("%s.Entry%d", section, i));
+        table[i].unserializeSection(cp, csprintf("Entry%d", i));
         if (table[i].valid) {
             lookupTable.insert(make_pair(table[i].tag, i));
         }
diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh
index ccd4362d3..73ffda1f6 100644
--- a/src/arch/alpha/tlb.hh
+++ b/src/arch/alpha/tlb.hh
@@ -74,11 +74,10 @@ class TLB : public BaseTLB
     typedef std::multimap<Addr, int> PageTable;
     PageTable lookupTable;  // Quick lookup into page table
 
-    TlbEntry *table;        // the Page Table
-    int size;               // TLB Size
+    std::vector<TlbEntry> table; // the Page Table
     int nlu;                // not last used entry (for replacement)
 
-    void nextnlu() { if (++nlu >= size) nlu = 0; }
+    void nextnlu() { if (++nlu >= table.size()) nlu = 0; }
     TlbEntry *lookup(Addr vpn, uint8_t asn);
 
   public:
@@ -90,7 +89,7 @@ class TLB : public BaseTLB
 
     virtual void regStats();
 
-    int getsize() const { return size; }
+    int getsize() const { return table.size(); }
 
     TlbEntry &index(bool advance = true);
     void insert(Addr vaddr, TlbEntry &entry);
@@ -118,8 +117,8 @@ class TLB : public BaseTLB
     static Fault checkCacheability(RequestPtr &req, bool itb = false);
 
     // Checkpointing
-    virtual void serialize(std::ostream &os);
-    virtual void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     // Most recently used page table entries
     TlbEntry *EntryCache[3];
diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index f93ea5c8f..d5d2dac34 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -272,14 +272,14 @@ class Interrupts : public SimObject
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const
     {
         SERIALIZE_ARRAY(interrupts, NumInterruptTypes);
         SERIALIZE_SCALAR(intStatus);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp)
     {
         UNSERIALIZE_ARRAY(interrupts, NumInterruptTypes);
         UNSERIALIZE_SCALAR(intStatus);
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 11f25de6d..a07017c17 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -402,7 +402,7 @@ namespace ArmISA
             return flat_idx;
         }
 
-        void serialize(std::ostream &os)
+        void serialize(CheckpointOut &cp) const
         {
             DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
             SERIALIZE_ARRAY(miscRegs, NumMiscRegs);
@@ -413,7 +413,7 @@ namespace ArmISA
             SERIALIZE_SCALAR(haveLargeAsid64);
             SERIALIZE_SCALAR(physAddrRange64);
         }
-        void unserialize(Checkpoint *cp, const std::string &section)
+        void unserialize(CheckpointIn &cp)
         {
             DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
             UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs);
diff --git a/src/arch/arm/kvm/gic.cc b/src/arch/arm/kvm/gic.cc
index 9010d8df8..a0e0e7899 100644
--- a/src/arch/arm/kvm/gic.cc
+++ b/src/arch/arm/kvm/gic.cc
@@ -66,13 +66,13 @@ KvmGic::~KvmGic()
 }
 
 void
-KvmGic::serialize(std::ostream &os)
+KvmGic::serialize(CheckpointOut &cp) const
 {
     panic("Checkpointing unsupported\n");
 }
 
 void
-KvmGic::unserialize(Checkpoint *cp, const std::string &sec)
+KvmGic::unserialize(CheckpointIn &cp)
 {
     panic("Checkpointing unsupported\n");
 }
diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh
index 3b196d108..4a115c87c 100644
--- a/src/arch/arm/kvm/gic.hh
+++ b/src/arch/arm/kvm/gic.hh
@@ -79,7 +79,7 @@ class KvmGic : public BaseGic
     void startup() M5_ATTR_OVERRIDE { verifyMemoryMode(); }
     void drainResume() M5_ATTR_OVERRIDE { verifyMemoryMode(); }
 
-    void serialize(std::ostream &os) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
     void unserialize(Checkpoint *cp, const std::string &sec)  M5_ATTR_OVERRIDE;
 
   public: // PioDevice
diff --git a/src/arch/arm/pagetable.hh b/src/arch/arm/pagetable.hh
index c1956cf09..3de993d27 100644
--- a/src/arch/arm/pagetable.hh
+++ b/src/arch/arm/pagetable.hh
@@ -61,12 +61,12 @@ struct VAddr
 // ITB/DTB page table entry
 struct PTE
 {
-    void serialize(std::ostream &os)
+    void serialize(CheckpointOut &cp) const
     {
         panic("Need to implement PTE serialization\n");
     }
 
-    void unserialize(Checkpoint *cp, const std::string &section)
+    void unserialize(CheckpointIn &cp)
     {
         panic("Need to implement PTE serialization\n");
     }
@@ -83,7 +83,7 @@ enum LookupLevel {
 };
 
 // ITB/DTB table entry
-struct TlbEntry
+struct TlbEntry : public Serializable
 {
   public:
     enum class MemoryType : std::uint8_t {
@@ -284,7 +284,7 @@ struct TlbEntry
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
         SERIALIZE_SCALAR(longDescFormat);
         SERIALIZE_SCALAR(pfn);
@@ -311,10 +311,10 @@ struct TlbEntry
         SERIALIZE_SCALAR(ap);
         SERIALIZE_SCALAR(hap);
         uint8_t domain_ = static_cast<uint8_t>(domain);
-        paramOut(os, "domain", domain_);
+        paramOut(cp, "domain", domain_);
     }
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
         UNSERIALIZE_SCALAR(longDescFormat);
         UNSERIALIZE_SCALAR(pfn);
@@ -341,7 +341,7 @@ struct TlbEntry
         UNSERIALIZE_SCALAR(ap);
         UNSERIALIZE_SCALAR(hap);
         uint8_t domain_;
-        paramIn(cp, section, "domain", domain_);
+        paramIn(cp, "domain", domain_);
         domain = static_cast<DomainType>(domain_);
     }
 
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index d20f4e27d..6ea053e55 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -513,7 +513,7 @@ PMU::raiseInterrupt()
 }
 
 void
-PMU::serialize(std::ostream &os)
+PMU::serialize(CheckpointOut &cp) const
 {
     DPRINTF(Checkpoint, "Serializing Arm PMU\n");
 
@@ -525,17 +525,14 @@ PMU::serialize(std::ostream &os)
     SERIALIZE_SCALAR(reg_pmceid);
     SERIALIZE_SCALAR(clock_remainder);
 
-    for (size_t i = 0; i < counters.size(); ++i) {
-        nameOut(os, csprintf("%s.counters.%i", name(), i));
-        counters[i].serialize(os);
-    }
+    for (size_t i = 0; i < counters.size(); ++i)
+        counters[i].serializeSection(cp, csprintf("counters.%i", i));
 
-    nameOut(os, csprintf("%s.cycleCounter", name()));
-    cycleCounter.serialize(os);
+    cycleCounter.serializeSection(cp, "cycleCounter");
 }
 
 void
-PMU::unserialize(Checkpoint *cp, const std::string &section)
+PMU::unserialize(CheckpointIn &cp)
 {
     DPRINTF(Checkpoint, "Unserializing Arm PMU\n");
 
@@ -548,13 +545,13 @@ PMU::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(clock_remainder);
 
     for (size_t i = 0; i < counters.size(); ++i)
-        counters[i].unserialize(cp, csprintf("%s.counters.%i", section, i));
+        counters[i].unserializeSection(cp, csprintf("counters.%i", i));
 
-    cycleCounter.unserialize(cp, csprintf("%s.cycleCounter", section));
+    cycleCounter.unserializeSection(cp, "cycleCounter");
 }
 
 void
-PMU::CounterState::serialize(std::ostream &os)
+PMU::CounterState::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(eventId);
     SERIALIZE_SCALAR(value);
@@ -563,7 +560,7 @@ PMU::CounterState::serialize(std::ostream &os)
 }
 
 void
-PMU::CounterState::unserialize(Checkpoint *cp, const std::string &section)
+PMU::CounterState::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(eventId);
     UNSERIALIZE_SCALAR(value);
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index 94f8c2397..80be965a4 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -96,8 +96,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
     void addEventProbe(unsigned int id, SimObject *obj, const char *name);
 
   public: // SimObject and related interfaces
-    void serialize(std::ostream &os) M5_ATTR_OVERRIDE;
-    void unserialize(Checkpoint *cp, const std::string &sec) M5_ATTR_OVERRIDE;
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     void drainResume() M5_ATTR_OVERRIDE;
 
@@ -321,7 +321,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
     };
 
     /** State of a counter within the PMU. */
-    struct CounterState {
+    struct CounterState : public Serializable {
         CounterState()
             : eventId(0), filter(0), value(0), enabled(false),
               overflow64(false) {
@@ -329,8 +329,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
             listeners.reserve(4);
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+        void unserialize(CheckpointIn &cp)  M5_ATTR_OVERRIDE;
 
         /**
          * Add an event count to the counter and check for overflow.
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 9a706a166..11075f02c 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -383,7 +383,7 @@ TLB::takeOverFrom(BaseTLB *_otlb)
 }
 
 void
-TLB::serialize(ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
     DPRINTF(Checkpoint, "Serializing Arm TLB\n");
 
@@ -394,14 +394,12 @@ TLB::serialize(ostream &os)
 
     int num_entries = size;
     SERIALIZE_SCALAR(num_entries);
-    for(int i = 0; i < size; i++){
-        nameOut(os, csprintf("%s.TlbEntry%d", name(), i));
-        table[i].serialize(os);
-    }
+    for(int i = 0; i < size; i++)
+        table[i].serializeSection(cp, csprintf("TlbEntry%d", i));
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
     DPRINTF(Checkpoint, "Unserializing Arm TLB\n");
 
@@ -412,9 +410,8 @@ TLB::unserialize(Checkpoint *cp, const string &section)
 
     int num_entries;
     UNSERIALIZE_SCALAR(num_entries);
-    for(int i = 0; i < min(size, num_entries); i++){
-        table[i].unserialize(cp, csprintf("%s.TlbEntry%d", section, i));
-    }
+    for(int i = 0; i < min(size, num_entries); i++)
+        table[i].unserializeSection(cp, csprintf("TlbEntry%d", i));
 }
 
 void
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index 5d418ef17..28b99a8e0 100644
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -287,8 +287,8 @@ class TLB : public BaseTLB
     void drainResume();
 
     // Checkpointing
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     void regStats();
 
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index eff8f13fb..c54bfb5f4 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -483,9 +483,9 @@ namespace ArmISA
         }
 
         void
-        serialize(std::ostream &os)
+        serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
         {
-            Base::serialize(os);
+            Base::serialize(cp);
             SERIALIZE_SCALAR(flags);
             SERIALIZE_SCALAR(_size);
             SERIALIZE_SCALAR(nextFlags);
@@ -494,9 +494,9 @@ namespace ArmISA
         }
 
         void
-        unserialize(Checkpoint *cp, const std::string &section)
+        unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
         {
-            Base::unserialize(cp, section);
+            Base::unserialize(cp);
             UNSERIALIZE_SCALAR(flags);
             UNSERIALIZE_SCALAR(_size);
             UNSERIALIZE_SCALAR(nextFlags);
diff --git a/src/arch/generic/types.hh b/src/arch/generic/types.hh
index 0381e9953..8e35b5b2f 100644
--- a/src/arch/generic/types.hh
+++ b/src/arch/generic/types.hh
@@ -41,7 +41,7 @@ namespace GenericISA
 {
 
 // The guaranteed interface.
-class PCStateBase
+class PCStateBase : public Serializable
 {
   protected:
     Addr _pc;
@@ -105,14 +105,14 @@ class PCStateBase
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
         SERIALIZE_SCALAR(_pc);
         SERIALIZE_SCALAR(_npc);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
         UNSERIALIZE_SCALAR(_pc);
         UNSERIALIZE_SCALAR(_npc);
@@ -248,17 +248,17 @@ class UPCState : public SimplePCState<MachInst>
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
-        Base::serialize(os);
+        Base::serialize(cp);
         SERIALIZE_SCALAR(_upc);
         SERIALIZE_SCALAR(_nupc);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
-        Base::unserialize(cp, section);
+        Base::unserialize(cp);
         UNSERIALIZE_SCALAR(_upc);
         UNSERIALIZE_SCALAR(_nupc);
     }
@@ -329,16 +329,16 @@ class DelaySlotPCState : public SimplePCState<MachInst>
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
-        Base::serialize(os);
+        Base::serialize(cp);
         SERIALIZE_SCALAR(_nnpc);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
-        Base::unserialize(cp, section);
+        Base::unserialize(cp);
         UNSERIALIZE_SCALAR(_nnpc);
     }
 };
@@ -426,17 +426,17 @@ class DelaySlotUPCState : public DelaySlotPCState<MachInst>
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
-        Base::serialize(os);
+        Base::serialize(cp);
         SERIALIZE_SCALAR(_upc);
         SERIALIZE_SCALAR(_nupc);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
-        Base::unserialize(cp, section);
+        Base::unserialize(cp);
         UNSERIALIZE_SCALAR(_upc);
         UNSERIALIZE_SCALAR(_nupc);
     }
diff --git a/src/arch/mips/interrupts.hh b/src/arch/mips/interrupts.hh
index 8367bf91c..3c9165bfa 100755
--- a/src/arch/mips/interrupts.hh
+++ b/src/arch/mips/interrupts.hh
@@ -116,13 +116,13 @@ class Interrupts : public SimObject
 
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
         fatal("Serialization of Interrupts Unimplemented for MIPS");
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
         fatal("Unserialization of Interrupts Unimplemented for MIPS");
     }
diff --git a/src/arch/mips/pagetable.cc b/src/arch/mips/pagetable.cc
index b4304060c..26d9bf408 100644
--- a/src/arch/mips/pagetable.cc
+++ b/src/arch/mips/pagetable.cc
@@ -38,7 +38,7 @@ namespace MipsISA
 {
 
 void
-PTE::serialize(std::ostream &os)
+PTE::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(Mask);
     SERIALIZE_SCALAR(VPN);
@@ -57,7 +57,7 @@ PTE::serialize(std::ostream &os)
 }
 
 void
-PTE::unserialize(Checkpoint *cp, const std::string &section)
+PTE::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(Mask);
     UNSERIALIZE_SCALAR(VPN);
diff --git a/src/arch/mips/pagetable.hh b/src/arch/mips/pagetable.hh
index 992d6649b..cc4e4a859 100755
--- a/src/arch/mips/pagetable.hh
+++ b/src/arch/mips/pagetable.hh
@@ -74,8 +74,8 @@ struct PTE
     int OffsetMask;
 
     bool Valid() { return (V0 | V1); };
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const;
+    void unserialize(CheckpointIn &cp);
 };
 
 // WARN: This particular TLB entry is not necessarily conformed to MIPS ISA
@@ -100,12 +100,12 @@ struct TlbEntry
     void
     updateVaddr(Addr new_vaddr) {}
 
-    void serialize(std::ostream &os)
+    void serialize(CheckpointOut &cp) const
     {
         SERIALIZE_SCALAR(_pageStart);
     }
 
-    void unserialize(Checkpoint *cp, const std::string &section)
+    void unserialize(CheckpointIn &cp)
     {
         UNSERIALIZE_SCALAR(_pageStart);
     }
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc
index 6c46cacc6..d2aa5ad70 100644
--- a/src/arch/mips/tlb.cc
+++ b/src/arch/mips/tlb.cc
@@ -197,25 +197,26 @@ TLB::flushAll()
 }
 
 void
-TLB::serialize(ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(size);
     SERIALIZE_SCALAR(nlu);
 
     for (int i = 0; i < size; i++) {
-        nameOut(os, csprintf("%s.PTE%d", name(), i));
-        table[i].serialize(os);
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", i));
+        table[i].serialize(cp);
     }
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(size);
     UNSERIALIZE_SCALAR(nlu);
 
     for (int i = 0; i < size; i++) {
-        table[i].unserialize(cp, csprintf("%s.PTE%d", section, i));
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", i));
+        table[i].unserialize(cp);
         if (table[i].V0 || table[i].V1) {
             lookupTable.insert(make_pair(table[i].VPN, i));
         }
diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh
index c7cd5e631..5a9069e4c 100644
--- a/src/arch/mips/tlb.hh
+++ b/src/arch/mips/tlb.hh
@@ -107,8 +107,8 @@ class TLB : public BaseTLB
     static Fault checkCacheability(RequestPtr &req);
 
     // Checkpointing
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     void regStats();
 
diff --git a/src/arch/power/pagetable.cc b/src/arch/power/pagetable.cc
index 091fb8bc8..4af0b7919 100644
--- a/src/arch/power/pagetable.cc
+++ b/src/arch/power/pagetable.cc
@@ -42,7 +42,7 @@ namespace PowerISA
 {
 
 void
-PTE::serialize(std::ostream &os)
+PTE::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(Mask);
     SERIALIZE_SCALAR(VPN);
@@ -61,7 +61,7 @@ PTE::serialize(std::ostream &os)
 }
 
 void
-PTE::unserialize(Checkpoint *cp, const std::string &section)
+PTE::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(Mask);
     UNSERIALIZE_SCALAR(VPN);
diff --git a/src/arch/power/pagetable.hh b/src/arch/power/pagetable.hh
index 3097aa526..d835a5316 100644
--- a/src/arch/power/pagetable.hh
+++ b/src/arch/power/pagetable.hh
@@ -146,9 +146,8 @@ struct PTE
         return (V0 | V1);
     };
 
-    void serialize(std::ostream &os);
-
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const;
+    void unserialize(CheckpointIn &cp);
 };
 
 } // namespace PowerISA
diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc
index 458ed29bf..edfb4f453 100644
--- a/src/arch/power/tlb.cc
+++ b/src/arch/power/tlb.cc
@@ -195,25 +195,25 @@ TLB::flushAll()
 }
 
 void
-TLB::serialize(ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(size);
     SERIALIZE_SCALAR(nlu);
 
     for (int i = 0; i < size; i++) {
-        nameOut(os, csprintf("%s.PTE%d", name(), i));
-        table[i].serialize(os);
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", i));
+        table[i].serialize(cp);
     }
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(size);
     UNSERIALIZE_SCALAR(nlu);
 
     for (int i = 0; i < size; i++) {
-        table[i].unserialize(cp, csprintf("%s.PTE%d", section, i));
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", i));
         if (table[i].V0 || table[i].V1) {
             lookupTable.insert(make_pair(table[i].VPN, i));
         }
diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh
index 9818774d8..a07dad954 100644
--- a/src/arch/power/tlb.hh
+++ b/src/arch/power/tlb.hh
@@ -84,13 +84,13 @@ struct TlbEntry
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const
     {
         SERIALIZE_SCALAR(_pageStart);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp)
     {
         UNSERIALIZE_SCALAR(_pageStart);
     }
@@ -172,8 +172,9 @@ class TLB : public BaseTLB
     Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const;
 
     // Checkpointing
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+
     void regStats();
 };
 
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
index 56cbbf0eb..432132f66 100644
--- a/src/arch/sparc/interrupts.hh
+++ b/src/arch/sparc/interrupts.hh
@@ -191,14 +191,14 @@ class Interrupts : public SimObject
     }
 
     void
-    serialize(std::ostream &os)
+    serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
     {
         SERIALIZE_ARRAY(interrupts,NumInterruptTypes);
         SERIALIZE_SCALAR(intStatus);
     }
 
     void
-    unserialize(Checkpoint *cp, const std::string &section)
+    unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
     {
         UNSERIALIZE_ARRAY(interrupts,NumInterruptTypes);
         UNSERIALIZE_SCALAR(intStatus);
diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc
index c9a3a33b4..a588eaf66 100644
--- a/src/arch/sparc/isa.cc
+++ b/src/arch/sparc/isa.cc
@@ -638,7 +638,7 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc)
 }
 
 void
-ISA::serialize(std::ostream &os)
+ISA::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(asi);
     SERIALIZE_SCALAR(tick);
@@ -714,7 +714,7 @@ ISA::serialize(std::ostream &os)
 }
 
 void
-ISA::unserialize(Checkpoint *cp, const std::string &section)
+ISA::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(asi);
     UNSERIALIZE_SCALAR(tick);
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index 4551cf3c1..1d2a457d2 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -167,9 +167,8 @@ class ISA : public SimObject
 
     void clear();
 
-    void serialize(std::ostream & os);
-
-    void unserialize(Checkpoint *cp, const std::string & section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     void startup(ThreadContext *tc) {}
 
diff --git a/src/arch/sparc/pagetable.cc b/src/arch/sparc/pagetable.cc
index bdd3e97fe..f0d2c10cf 100644
--- a/src/arch/sparc/pagetable.cc
+++ b/src/arch/sparc/pagetable.cc
@@ -35,7 +35,7 @@ namespace SparcISA
 {
 
 void
-TlbEntry::serialize(std::ostream &os)
+TlbEntry::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(range.va);
     SERIALIZE_SCALAR(range.size);
@@ -52,7 +52,7 @@ TlbEntry::serialize(std::ostream &os)
 
 
 void
-TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
+TlbEntry::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(range.va);
     UNSERIALIZE_SCALAR(range.size);
diff --git a/src/arch/sparc/pagetable.hh b/src/arch/sparc/pagetable.hh
index 727727f95..79b4d3cc5 100644
--- a/src/arch/sparc/pagetable.hh
+++ b/src/arch/sparc/pagetable.hh
@@ -277,8 +277,8 @@ struct TlbEntry
         range.va = new_vaddr;
     }
 
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const;
+    void unserialize(CheckpointIn &cp);
 };
 
 } // namespace SparcISA
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 0b36df9ca..b6fa645ce 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -177,26 +177,26 @@ SparcSystem::~SparcSystem()
 }
 
 void
-SparcSystem::serializeSymtab(std::ostream &os)
+SparcSystem::serializeSymtab(CheckpointOut &cp) const
 {
-    resetSymtab->serialize("reset_symtab", os);
-    hypervisorSymtab->serialize("hypervisor_symtab", os);
-    openbootSymtab->serialize("openboot_symtab", os);
-    nvramSymtab->serialize("nvram_symtab", os);
-    hypervisorDescSymtab->serialize("hypervisor_desc_symtab", os);
-    partitionDescSymtab->serialize("partition_desc_symtab", os);
+    resetSymtab->serialize("reset_symtab", cp);
+    hypervisorSymtab->serialize("hypervisor_symtab", cp);
+    openbootSymtab->serialize("openboot_symtab", cp);
+    nvramSymtab->serialize("nvram_symtab", cp);
+    hypervisorDescSymtab->serialize("hypervisor_desc_symtab", cp);
+    partitionDescSymtab->serialize("partition_desc_symtab", cp);
 }
 
 
 void
-SparcSystem::unserializeSymtab(Checkpoint *cp, const std::string &section)
+SparcSystem::unserializeSymtab(CheckpointIn &cp)
 {
-    resetSymtab->unserialize("reset_symtab", cp, section);
-    hypervisorSymtab->unserialize("hypervisor_symtab", cp, section);
-    openbootSymtab->unserialize("openboot_symtab", cp, section);
-    nvramSymtab->unserialize("nvram_symtab", cp, section);
-    hypervisorDescSymtab->unserialize("hypervisor_desc_symtab", cp, section);
-    partitionDescSymtab->unserialize("partition_desc_symtab", cp, section);
+    resetSymtab->unserialize("reset_symtab", cp);
+    hypervisorSymtab->unserialize("hypervisor_symtab", cp);
+    openbootSymtab->unserialize("openboot_symtab", cp);
+    nvramSymtab->unserialize("nvram_symtab", cp);
+    hypervisorDescSymtab->unserialize("hypervisor_desc_symtab", cp);
+    partitionDescSymtab->unserialize("partition_desc_symtab", cp);
 }
 
 SparcSystem *
diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh
index a4bd64aa5..68688cc1f 100644
--- a/src/arch/sparc/system.hh
+++ b/src/arch/sparc/system.hh
@@ -54,8 +54,8 @@ class SparcSystem : public System
  * Serialization stuff
  */
   public:
-    virtual void serializeSymtab(std::ostream &os);
-    virtual void unserializeSymtab(Checkpoint *cp, const std::string &section);
+    void serializeSymtab(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserializeSymtab(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     /** reset binary symbol table */
     SymbolTable *resetSymtab;
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 84d748dd3..c0c28f952 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -1353,23 +1353,18 @@ TLB::MakeTsbPtr(TsbPageSize ps, uint64_t tag_access, uint64_t c0_tsb,
 }
 
 void
-TLB::serialize(std::ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(size);
     SERIALIZE_SCALAR(usedEntries);
     SERIALIZE_SCALAR(lastReplaced);
 
     // convert the pointer based free list into an index based one
-    int *free_list = (int*)malloc(sizeof(int) * size);
-    int cntr = 0;
-    std::list<TlbEntry*>::iterator i;
-    i = freeList.begin();
-    while (i != freeList.end()) {
-        free_list[cntr++] = ((size_t)*i - (size_t)tlb)/ sizeof(TlbEntry);
-        i++;
-    }
-    SERIALIZE_SCALAR(cntr);
-    SERIALIZE_ARRAY(free_list,  cntr);
+    std::vector<int> free_list;
+    for (const TlbEntry *entry : freeList)
+        free_list.push_back(entry - tlb);
+
+    SERIALIZE_CONTAINER(free_list);
 
     SERIALIZE_SCALAR(c0_tsb_ps0);
     SERIALIZE_SCALAR(c0_tsb_ps1);
@@ -1381,31 +1376,28 @@ TLB::serialize(std::ostream &os)
     SERIALIZE_SCALAR(tag_access);
 
     for (int x = 0; x < size; x++) {
-        nameOut(os, csprintf("%s.PTE%d", name(), x));
-        tlb[x].serialize(os);
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", x));
+        tlb[x].serialize(cp);
     }
     SERIALIZE_SCALAR(sfar);
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const std::string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
     int oldSize;
 
-    paramIn(cp, section, "size", oldSize);
+    paramIn(cp, "size", oldSize);
     if (oldSize != size)
         panic("Don't support unserializing different sized TLBs\n");
     UNSERIALIZE_SCALAR(usedEntries);
     UNSERIALIZE_SCALAR(lastReplaced);
 
-    int cntr;
-    UNSERIALIZE_SCALAR(cntr);
-
-    int *free_list = (int*)malloc(sizeof(int) * cntr);
+    std::vector<int> free_list;
+    UNSERIALIZE_CONTAINER(free_list);
     freeList.clear();
-    UNSERIALIZE_ARRAY(free_list,  cntr);
-    for (int x = 0; x < cntr; x++)
-        freeList.push_back(&tlb[free_list[x]]);
+    for (int idx : free_list)
+        freeList.push_back(&tlb[idx]);
 
     UNSERIALIZE_SCALAR(c0_tsb_ps0);
     UNSERIALIZE_SCALAR(c0_tsb_ps1);
@@ -1418,7 +1410,8 @@ TLB::unserialize(Checkpoint *cp, const std::string &section)
 
     lookupTable.clear();
     for (int x = 0; x < size; x++) {
-        tlb[x].unserialize(cp, csprintf("%s.PTE%d", section, x));
+        ScopedCheckpointSection sec(cp, csprintf("PTE%d", x));
+        tlb[x].unserialize(cp);
         if (tlb[x].valid)
             lookupTable.insert(tlb[x].range, &tlb[x]);
 
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index 1d229fba7..e64d3f1b4 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -176,8 +176,8 @@ class TLB : public BaseTLB
     void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
 
     // Checkpointing
-    virtual void serialize(std::ostream &os);
-    virtual void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     /** Give an entry id, read that tlb entries' tte */
     uint64_t TteRead(int entry);
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 171e8a1c5..556cdda37 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -729,7 +729,7 @@ X86ISA::Interrupts::updateIntrInfo(ThreadContext *tc)
 }
 
 void
-X86ISA::Interrupts::serialize(std::ostream &os)
+X86ISA::Interrupts::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_ARRAY(regs, NUM_APIC_REGS);
     SERIALIZE_SCALAR(pendingSmi);
@@ -754,7 +754,7 @@ X86ISA::Interrupts::serialize(std::ostream &os)
 }
 
 void
-X86ISA::Interrupts::unserialize(Checkpoint *cp, const std::string &section)
+X86ISA::Interrupts::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_ARRAY(regs, NUM_APIC_REGS);
     UNSERIALIZE_SCALAR(pendingSmi);
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh
index b584c234b..272cfea44 100644
--- a/src/arch/x86/interrupts.hh
+++ b/src/arch/x86/interrupts.hh
@@ -293,9 +293,8 @@ class Interrupts : public BasicPioDevice, IntDevice
     /*
      * Serialization.
      */
-
-    virtual void serialize(std::ostream &os);
-    virtual void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+    void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
     /*
      * Old functions needed for compatability but which will be phased out
diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc
index f9b99db0f..213a9e2e3 100644
--- a/src/arch/x86/isa.cc
+++ b/src/arch/x86/isa.cc
@@ -409,13 +409,13 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc)
 }
 
 void
-ISA::serialize(std::ostream & os)
+ISA::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_ARRAY(regVal, NumMiscRegs);
 }
 
 void
-ISA::unserialize(Checkpoint * cp, const std::string & section)
+ISA::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_ARRAY(regVal, NumMiscRegs);
     updateHandyM5Reg(regVal[MISCREG_EFER],
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index a82b4ae2f..88f4980ae 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -97,8 +97,9 @@ namespace X86ISA
             return reg;
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+        void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
+
         void startup(ThreadContext *tc);
 
         /// Explicitly import the otherwise hidden startup
diff --git a/src/arch/x86/pagetable.cc b/src/arch/x86/pagetable.cc
index cd4df42e7..4e8c39eb9 100644
--- a/src/arch/x86/pagetable.cc
+++ b/src/arch/x86/pagetable.cc
@@ -45,15 +45,22 @@
 namespace X86ISA
 {
 
+TlbEntry::TlbEntry()
+    : paddr(0), vaddr(0), logBytes(0), writable(0),
+      user(true), uncacheable(0), global(false), patBit(0),
+      noExec(false), lruSeq(0)
+{
+}
+
 TlbEntry::TlbEntry(Addr asn, Addr _vaddr, Addr _paddr,
                    bool uncacheable, bool read_only) :
     paddr(_paddr), vaddr(_vaddr), logBytes(PageShift), writable(!read_only),
     user(true), uncacheable(uncacheable), global(false), patBit(0),
-    noExec(false)
+    noExec(false), lruSeq(0)
 {}
 
 void
-TlbEntry::serialize(std::ostream &os)
+TlbEntry::serialize(CheckpointOut &cp) const
 {
     SERIALIZE_SCALAR(paddr);
     SERIALIZE_SCALAR(vaddr);
@@ -68,7 +75,7 @@ TlbEntry::serialize(std::ostream &os)
 }
 
 void
-TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
+TlbEntry::unserialize(CheckpointIn &cp)
 {
     UNSERIALIZE_SCALAR(paddr);
     UNSERIALIZE_SCALAR(vaddr);
diff --git a/src/arch/x86/pagetable.hh b/src/arch/x86/pagetable.hh
index 639815893..3345366d0 100644
--- a/src/arch/x86/pagetable.hh
+++ b/src/arch/x86/pagetable.hh
@@ -97,7 +97,7 @@ namespace X86ISA
     EndBitUnion(PageTableEntry)
 
 
-    struct TlbEntry
+    struct TlbEntry : public Serializable
     {
         // The base of the physical page.
         Addr paddr;
@@ -130,7 +130,7 @@ namespace X86ISA
 
         TlbEntry(Addr asn, Addr _vaddr, Addr _paddr,
                  bool uncacheable, bool read_only);
-        TlbEntry() {}
+        TlbEntry();
 
         void
         updateVaddr(Addr new_vaddr)
@@ -149,8 +149,8 @@ namespace X86ISA
             return (1 << logBytes);
         }
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+        void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
     };
 
     /** The size of each level of the page table expressed in base 2
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 86e051deb..d0e77bc9b 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -62,13 +62,12 @@
 
 namespace X86ISA {
 
-TLB::TLB(const Params *p) : BaseTLB(p), configAddress(0), size(p->size),
-    lruSeq(0)
+TLB::TLB(const Params *p)
+    : BaseTLB(p), configAddress(0), size(p->size),
+      tlb(size), lruSeq(0)
 {
     if (!size)
         fatal("TLBs must have a non-zero size.\n");
-    tlb = new TlbEntry[size];
-    std::memset(tlb, 0, sizeof(TlbEntry) * size);
 
     for (int x = 0; x < size; x++) {
         tlb[x].trieHandle = NULL;
@@ -451,7 +450,7 @@ TLB::getWalker()
 }
 
 void
-TLB::serialize(std::ostream &os)
+TLB::serialize(CheckpointOut &cp) const
 {
     // Only store the entries in use.
     uint32_t _size = size - freeList.size();
@@ -459,18 +458,14 @@ TLB::serialize(std::ostream &os)
     SERIALIZE_SCALAR(lruSeq);
 
     uint32_t _count = 0;
-
     for (uint32_t x = 0; x < size; x++) {
-        if (tlb[x].trieHandle != NULL) {
-            os << "\n[" << csprintf("%s.Entry%d", name(), _count) << "]\n";
-            tlb[x].serialize(os);
-            _count++;
-        }
+        if (tlb[x].trieHandle != NULL)
+            tlb[x].serializeSection(cp, csprintf("Entry%d", _count++));
     }
 }
 
 void
-TLB::unserialize(Checkpoint *cp, const std::string &section)
+TLB::unserialize(CheckpointIn &cp)
 {
     // Do not allow to restore with a smaller tlb.
     uint32_t _size;
@@ -485,7 +480,7 @@ TLB::unserialize(Checkpoint *cp, const std::string &section)
         TlbEntry *newEntry = freeList.front();
         freeList.pop_front();
 
-        newEntry->unserialize(cp, csprintf("%s.Entry%d", name(), x));
+        newEntry->unserializeSection(cp, csprintf("Entry%d", x));
         newEntry->trieHandle = trie.insert(newEntry->vaddr,
             TlbEntryTrie::MaxBits - newEntry->logBytes, newEntry);
     }
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index 77f9fc49d..83ec7cc59 100644
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -98,7 +98,7 @@ namespace X86ISA
       protected:
         uint32_t size;
 
-        TlbEntry * tlb;
+        std::vector<TlbEntry> tlb;
 
         EntryList freeList;
 
@@ -148,8 +148,8 @@ namespace X86ISA
         TlbEntry * insert(Addr vpn, TlbEntry &entry);
 
         // Checkpointing
-        virtual void serialize(std::ostream &os);
-        virtual void unserialize(Checkpoint *cp, const std::string &section);
+        void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+        void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
 
         /**
          * Get the table walker master port. This is used for
diff --git a/src/arch/x86/types.cc b/src/arch/x86/types.cc
index 830a131e5..a960205b5 100644
--- a/src/arch/x86/types.cc
+++ b/src/arch/x86/types.cc
@@ -36,69 +36,68 @@ using namespace std;
 
 template <>
 void
-paramOut(ostream &os, const string &name, ExtMachInst const &machInst)
+paramOut(CheckpointOut &cp, const string &name, ExtMachInst const &machInst)
 {
     // Prefixes
-    paramOut(os, name + ".legacy", (uint8_t)machInst.legacy);
-    paramOut(os, name + ".rex", (uint8_t)machInst.rex);
+    paramOut(cp, name + ".legacy", (uint8_t)machInst.legacy);
+    paramOut(cp, name + ".rex", (uint8_t)machInst.rex);
 
     // Opcode
-    paramOut(os, name + ".opcode.type", (uint8_t)machInst.opcode.type);
-    paramOut(os, name + ".opcode.op", (uint8_t)machInst.opcode.op);
+    paramOut(cp, name + ".opcode.type", (uint8_t)machInst.opcode.type);
+    paramOut(cp, name + ".opcode.op", (uint8_t)machInst.opcode.op);
 
     // Modifier bytes
-    paramOut(os, name + ".modRM", (uint8_t)machInst.modRM);
-    paramOut(os, name + ".sib", (uint8_t)machInst.sib);
+    paramOut(cp, name + ".modRM", (uint8_t)machInst.modRM);
+    paramOut(cp, name + ".sib", (uint8_t)machInst.sib);
 
     // Immediate fields
-    paramOut(os, name + ".immediate", machInst.immediate);
-    paramOut(os, name + ".displacement", machInst.displacement);
+    paramOut(cp, name + ".immediate", machInst.immediate);
+    paramOut(cp, name + ".displacement", machInst.displacement);
 
     // Sizes
-    paramOut(os, name + ".opSize", machInst.opSize);
-    paramOut(os, name + ".addrSize", machInst.addrSize);
-    paramOut(os, name + ".stackSize", machInst.stackSize);
-    paramOut(os, name + ".dispSize", machInst.dispSize);
+    paramOut(cp, name + ".opSize", machInst.opSize);
+    paramOut(cp, name + ".addrSize", machInst.addrSize);
+    paramOut(cp, name + ".stackSize", machInst.stackSize);
+    paramOut(cp, name + ".dispSize", machInst.dispSize);
 
     // Mode
-    paramOut(os, name + ".mode", (uint8_t)machInst.mode);
+    paramOut(cp, name + ".mode", (uint8_t)machInst.mode);
 }
 
 template <>
 void
-paramIn(Checkpoint *cp, const string &section,
-        const string &name, ExtMachInst &machInst)
+paramIn(CheckpointIn &cp, const string &name, ExtMachInst &machInst)
 {
     uint8_t temp8;
     // Prefixes
-    paramIn(cp, section, name + ".legacy", temp8);
+    paramIn(cp, name + ".legacy", temp8);
     machInst.legacy = temp8;
-    paramIn(cp, section, name + ".rex", temp8);
+    paramIn(cp, name + ".rex", temp8);
     machInst.rex = temp8;
 
     // Opcode
-    paramIn(cp, section, name + ".opcode.type", temp8);
+    paramIn(cp, name + ".opcode.type", temp8);
     machInst.opcode.type = (OpcodeType)temp8;
-    paramIn(cp, section, name + ".opcode.op", temp8);
+    paramIn(cp, name + ".opcode.op", temp8);
     machInst.opcode.op = temp8;
 
     // Modifier bytes
-    paramIn(cp, section, name + ".modRM", temp8);
+    paramIn(cp, name + ".modRM", temp8);
     machInst.modRM = temp8;
-    paramIn(cp, section, name + ".sib", temp8);
+    paramIn(cp, name + ".sib", temp8);
     machInst.sib = temp8;;
 
     // Immediate fields
-    paramIn(cp, section, name + ".immediate", machInst.immediate);
-    paramIn(cp, section, name + ".displacement", machInst.displacement);
+    paramIn(cp, name + ".immediate", machInst.immediate);
+    paramIn(cp, name + ".displacement", machInst.displacement);
 
     // Sizes
-    paramIn(cp, section, name + ".opSize", machInst.opSize);
-    paramIn(cp, section, name + ".addrSize", machInst.addrSize);
-    paramIn(cp, section, name + ".stackSize", machInst.stackSize);
-    paramIn(cp, section, name + ".dispSize", machInst.dispSize);
+    paramIn(cp, name + ".opSize", machInst.opSize);
+    paramIn(cp, name + ".addrSize", machInst.addrSize);
+    paramIn(cp, name + ".stackSize", machInst.stackSize);
+    paramIn(cp, name + ".dispSize", machInst.dispSize);
 
     // Mode
-    paramIn(cp, section, name + ".mode", temp8);
+    paramIn(cp, name + ".mode", temp8);
     machInst.mode = temp8;
 }
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh
index dd60c0aec..23d60020b 100644
--- a/src/arch/x86/types.hh
+++ b/src/arch/x86/types.hh
@@ -276,16 +276,16 @@ namespace X86ISA
         }
 
         void
-        serialize(std::ostream &os)
+        serialize(CheckpointOut &cp) const
         {
-            Base::serialize(os);
+            Base::serialize(cp);
             SERIALIZE_SCALAR(_size);
         }
 
         void
-        unserialize(Checkpoint *cp, const std::string &section)
+        unserialize(CheckpointIn &cp)
         {
-            Base::unserialize(cp, section);
+            Base::unserialize(cp);
             UNSERIALIZE_SCALAR(_size);
         }
     };
@@ -314,11 +314,11 @@ __hash_namespace_end
 // and UNSERIALIZE_SCALAR.
 template <>
 void
-paramOut(std::ostream &os, const std::string &name,
+paramOut(CheckpointOut &cp, const std::string &name,
          const X86ISA::ExtMachInst &machInst);
 template <>
 void
-paramIn(Checkpoint *cp, const std::string &section,
-        const std::string &name, X86ISA::ExtMachInst &machInst);
+paramIn(CheckpointIn &cp, const std::string &name,
+        X86ISA::ExtMachInst &machInst);
 
 #endif // __ARCH_X86_TYPES_HH__