diff options
| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
| commit | 9e07a7504c94973e7837d1d3e96dbdb8d95cfad3 (patch) | |
| tree | 7f845430119da24bcb4405df3a1c2102f6b7b534 /src/arch | |
| parent | a5c4eb3de9deb3a71a6a5230a25ff5962e584980 (diff) | |
| download | gem5-9e07a7504c94973e7837d1d3e96dbdb8d95cfad3.tar.xz | |
cpu,isa,mem: Add per-thread wakeup logic
Changes wakeup functionality so that only specific threads on SMT
capable cpus are woken.
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/arm/locked_mem.hh | 2 | ||||
| -rw-r--r-- | src/arch/null/cpu_dummy.hh | 2 | ||||
| -rw-r--r-- | src/arch/x86/interrupts.cc | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/locked_mem.hh b/src/arch/arm/locked_mem.hh index 24c78e721..f324f773b 100644 --- a/src/arch/arm/locked_mem.hh +++ b/src/arch/arm/locked_mem.hh @@ -82,7 +82,7 @@ handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask) xc->setMiscReg(MISCREG_LOCKFLAG, false); // Implement ARMv8 WFE/SEV semantics xc->setMiscReg(MISCREG_SEV_MAILBOX, true); - xc->getCpuPtr()->wakeup(); + xc->getCpuPtr()->wakeup(xc->threadId()); } } diff --git a/src/arch/null/cpu_dummy.hh b/src/arch/null/cpu_dummy.hh index f546b4141..6f6311bcb 100644 --- a/src/arch/null/cpu_dummy.hh +++ b/src/arch/null/cpu_dummy.hh @@ -47,7 +47,7 @@ class BaseCPU public: static int numSimulatedInsts() { return 0; } static int numSimulatedOps() { return 0; } - static void wakeup() { ; } + static void wakeup(ThreadID tid) { ; } }; #endif // __ARCH_NULL_CPU_DUMMY_HH__ diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 556cdda37..1f7002ebe 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -290,7 +290,7 @@ X86ISA::Interrupts::requestInterrupt(uint8_t vector, } } if (FullSystem) - cpu->wakeup(); + cpu->wakeup(0); } |