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authorGabe Black <gblack@eecs.umich.edu>2007-06-19 18:17:34 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-19 18:17:34 +0000
commitea70e6d6daee29e7a4780d4b48f8140220ee2576 (patch)
tree3a494cf9de26a8319acfa6087186d03ad5bafb1b /src/arch
parentd49649279312fe8d05c27a91f94992d8d584c35b (diff)
downloadgem5-ea70e6d6daee29e7a4780d4b48f8140220ee2576.tar.xz
Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
--HG-- extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/predecoder.hh6
-rw-r--r--src/arch/mips/predecoder.hh3
-rw-r--r--src/arch/sparc/predecoder.hh4
-rw-r--r--src/arch/x86/predecoder.hh6
4 files changed, 6 insertions, 13 deletions
diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh
index 0407ce99b..4887de856 100644
--- a/src/arch/alpha/predecoder.hh
+++ b/src/arch/alpha/predecoder.hh
@@ -44,8 +44,6 @@ namespace AlphaISA
{
protected:
ThreadContext * tc;
- //The pc of the current instruction
- Addr fetchPC;
//The extended machine instruction being generated
ExtMachInst ext_inst;
@@ -69,10 +67,8 @@ namespace AlphaISA
//Use this to give data to the predecoder. This should be used
//when there is control flow.
- void moreBytes(Addr pc, Addr _fetchPC, Addr off, MachInst inst)
+ void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
{
- fetchPC = _fetchPC;
- assert(off == 0);
ext_inst = inst;
#if FULL_SYSTEM
if (pc && 0x1)
diff --git a/src/arch/mips/predecoder.hh b/src/arch/mips/predecoder.hh
index 90f768d73..e310dded4 100644
--- a/src/arch/mips/predecoder.hh
+++ b/src/arch/mips/predecoder.hh
@@ -66,9 +66,8 @@ namespace MipsISA
//Use this to give data to the predecoder. This should be used
//when there is control flow.
- void moreBytes(Addr pc, Addr fetchPC, Addr off, MachInst inst)
+ void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
{
- assert(off == 0);
emi = inst;
}
diff --git a/src/arch/sparc/predecoder.hh b/src/arch/sparc/predecoder.hh
index 38d8fd1a2..d990c3256 100644
--- a/src/arch/sparc/predecoder.hh
+++ b/src/arch/sparc/predecoder.hh
@@ -67,10 +67,8 @@ namespace SparcISA
//Use this to give data to the predecoder. This should be used
//when there is control flow.
- void moreBytes(Addr pc, Addr fetchPC, Addr off, MachInst inst)
+ void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
{
- assert(off == 0);
-
emi = inst;
//The I bit, bit 13, is used to figure out where the ASI
//should come from. Use that in the ExtMachInst. This is
diff --git a/src/arch/x86/predecoder.hh b/src/arch/x86/predecoder.hh
index 3c858f061..f34b66364 100644
--- a/src/arch/x86/predecoder.hh
+++ b/src/arch/x86/predecoder.hh
@@ -195,12 +195,12 @@ namespace X86ISA
//Use this to give data to the predecoder. This should be used
//when there is control flow.
- void moreBytes(Addr pc, Addr fetchPC, Addr off, MachInst data)
+ void moreBytes(Addr pc, Addr fetchPC, MachInst data)
{
+ DPRINTF(Predecoder, "Getting more bytes.\n");
basePC = fetchPC;
- offset = off;
+ offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
fetchChunk = data;
- assert(off < sizeof(MachInst));
outOfBytes = false;
process();
}