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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-06-12 00:54:05 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-06-12 00:54:05 -0400 |
| commit | b10742ee2b01213999ba9a3706093f5946097341 (patch) | |
| tree | 9ee2e60169f3094c0ea3472c967c7381d094c625 /src/arch | |
| parent | 69000baef3ad409607ca8682d4d0afd29bc8f263 (diff) | |
| download | gem5-b10742ee2b01213999ba9a3706093f5946097341.tar.xz | |
X86: Make the apic isr and irr work.
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/miscregfile.cc | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/arch/x86/miscregfile.cc b/src/arch/x86/miscregfile.cc index ee71842d2..1e02391e6 100644 --- a/src/arch/x86/miscregfile.cc +++ b/src/arch/x86/miscregfile.cc @@ -127,19 +127,10 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg) MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc) { if (miscReg >= MISCREG_APIC_START && miscReg <= MISCREG_APIC_END) { - if (miscReg >= MISCREG_APIC_IN_SERVICE(0) && - miscReg <= MISCREG_APIC_IN_SERVICE(15)) { - panic("Local APIC In-Service registers are unimplemented.\n"); - } if (miscReg >= MISCREG_APIC_TRIGGER_MODE(0) && miscReg <= MISCREG_APIC_TRIGGER_MODE(15)) { panic("Local APIC Trigger Mode registers are unimplemented.\n"); } - if (miscReg >= MISCREG_APIC_INTERRUPT_REQUEST(0) && - miscReg <= MISCREG_APIC_INTERRUPT_REQUEST(15)) { - panic("Local APIC Interrupt Request registers " - "are unimplemented.\n"); - } switch (miscReg) { case MISCREG_APIC_ARBITRATION_PRIORITY: panic("Local APIC Arbitration Priority register unimplemented.\n"); |