Merge with the main repository again.

5 files changed, 61 insertions, 25 deletions

diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 495cb722c..b671843cf 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -49,7 +49,8 @@ let {{
 
     svcIop = InstObjParams("svc", "Svc", "PredOp",
                            { "code": svcCode,
-                             "predicate_test": predicateTest }, ["IsSyscall"])
+                             "predicate_test": predicateTest },
+                           ["IsSyscall", "IsNonSpeculative", "IsSerializeAfter"])
     header_output = BasicDeclare.subst(svcIop)
     decoder_output = BasicConstructor.subst(svcIop)
     exec_output = PredOpExecute.subst(svcIop)
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 62b22472b..b2ab010c0 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -99,7 +99,7 @@ TableWalker::getPort(const std::string &if_name, int idx)
         System *sys = params()->sys;
         Tick minb = params()->min_backoff;
         Tick maxb = params()->max_backoff;
-        port = new DmaPort(this, sys, minb, maxb);
+        port = new DmaPort(this, sys, minb, maxb, true);
         return port;
     }
     return NULL;
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index bef8af2cd..915e34564 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -33,6 +33,11 @@ def template BasicExecDeclare {{
         Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
 }};
 
+def template DoFpOpDeclare {{
+        Fault doFpOp(%(CPU_exec_context)s *, Trace::InstRecord *)
+            const M5_NO_INLINE;
+}};
+
 // Definitions of execute methods that panic.
 def template BasicExecPanic {{
         Fault
@@ -58,6 +63,21 @@ def template BasicDeclare {{
 }};
 
 // Basic instruction class declaration template.
+def template FpBasicDeclare {{
+        /**
+         * Static instruction class for "%(mnemonic)s".
+         */
+        class %(class_name)s : public %(base_class)s
+        {
+          public:
+            // Constructor.
+            %(class_name)s(ExtMachInst machInst);
+            %(BasicExecDeclare)s
+            %(DoFpOpDeclare)s
+        };
+}};
+
+// Basic instruction class declaration template.
 def template BasicDeclareWithMnemonic {{
         /**
          * Static instruction class for "%(mnemonic)s".
@@ -110,6 +130,22 @@ def template BasicExecute {{
         }
 }};
 
+def template DoFpOpExecute {{
+        Fault
+        %(class_name)s::doFpOp(%(CPU_exec_context)s *xc,
+                Trace::InstRecord *traceData) const
+        {
+            Fault fault = NoFault;
+            %(op_decl)s;
+            %(op_rd)s;
+            %(fp_code)s;
+            if (fault == NoFault) {
+                %(op_wb)s;
+            }
+            return fault;
+        }
+}};
+
 // Basic decode template.
 def template BasicDecode {{
         return new %(class_name)s(machInst);
@@ -131,9 +167,9 @@ def format BasicOperate(code, *flags) {{
 }};
 
 def format FpBasic(code, *flags) {{
-        fp_code = """
-    Fsr |= bits(Fsr,4,0) << 5;
-    Fsr = insertBits(Fsr,4,0,0);
+    exec_code = """
+    Fsr |= bits(Fsr, 4, 0) << 5;
+    Fsr = insertBits(Fsr, 4, 0, 0);
     int newrnd = M5_FE_TONEAREST;
     switch (Fsr<31:30>) {
       case 0: newrnd = M5_FE_TONEAREST; break;
@@ -143,18 +179,18 @@ def format FpBasic(code, *flags) {{
     }
     int oldrnd = m5_fegetround();
     m5_fesetround(newrnd);
+    __asm__ __volatile__("" ::: "memory");
+    fault = doFpOp(xc, traceData);
+    __asm__ __volatile__("" ::: "memory");
+    m5_fesetround(oldrnd);
+    return fault;
 """
-
-        fp_code += code
-
-
-        fp_code += """
-   m5_fesetround(oldrnd);
-"""
-        fp_code = filterDoubles(fp_code)
-        iop = InstObjParams(name, Name, 'SparcStaticInst', fp_code, flags)
-        header_output = BasicDeclare.subst(iop)
-        decoder_output = BasicConstructor.subst(iop)
-        decode_block = BasicDecode.subst(iop)
-        exec_output = BasicExecute.subst(iop)
+    fp_code = filterDoubles(code)
+    iop = InstObjParams(name, Name, 'SparcStaticInst',
+            { "code" : exec_code, "fp_code" : fp_code }, flags)
+    header_output = FpBasicDeclare.subst(iop)
+    decoder_output = BasicConstructor.subst(iop)
+    decode_block = BasicDecode.subst(iop)
+    exec_output = BasicExecute.subst(iop)
+    exec_output += DoFpOpExecute.subst(iop)
 }};
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index a6e0564ba..bc139a609 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -1335,16 +1335,15 @@ let {{
                 if (selector.si || selector.ti) {
                     if (!desc.p) {
                         fault = new StackFault(selector);
-                    }
-                } else {
-                    if ((m5reg.submode != SixtyFourBitMode ||
-                                m5reg.cpl == 3) ||
-                            !(desc.s == 1 &&
-                            desc.type.codeOrData == 0 && desc.type.w) ||
+                    } else if (!(desc.s == 1 && desc.type.codeOrData == 0 &&
+                                desc.type.w) ||
                             (desc.dpl != m5reg.cpl) ||
                             (selector.rpl != m5reg.cpl)) {
                         fault = new GeneralProtection(selector);
                     }
+                } else if (m5reg.submode != SixtyFourBitMode ||
+                        m5reg.cpl == 3) {
+                    fault = new GeneralProtection(selector);
                 }
                 break;
               case SegIretCheck:
diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc
index 429b91687..a4aa93b48 100644
--- a/src/arch/x86/predecoder.cc
+++ b/src/arch/x86/predecoder.cc
@@ -186,7 +186,7 @@ namespace X86ISA
             DPRINTF(Predecoder, "Found two byte opcode.\n");
             emi.opcode.prefixA = nextByte;
         }
-        else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3F))
+        else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3A))
         {
             nextState = OpcodeState;
             DPRINTF(Predecoder, "Found three byte opcode.\n");