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authorGabe Black <gblack@eecs.umich.edu>2009-02-01 17:06:25 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-01 17:06:25 -0800
commit041402a949ac61c2b871ce0595fd6a406ea9629c (patch)
tree1b8837135a1c475ce64c173320508253df9292b9 /src/arch
parent6b53b8387e1a0c05d878d47962c27bf7493b6d36 (diff)
downloadgem5-041402a949ac61c2b871ce0595fd6a406ea9629c.tar.xz
X86: Fix the upper bound on some ranges that were setting up the micro code assembler.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/microasm.isa6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index f9e0a2fa8..bc49d3362 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -76,9 +76,9 @@ let {{
mainRom = X86MicrocodeRom('main ROM')
assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
# Add in symbols for the microcode registers
- for num in range(15):
+ for num in range(16):
assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
- for num in range(7):
+ for num in range(8):
assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
# Add in symbols for the segment descriptor registers
for letter in ("C", "D", "E", "F", "G", "H", "S"):
@@ -140,7 +140,7 @@ let {{
for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
- for reg in range(15):
+ for reg in range(16):
assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \