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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 04:57:28 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 04:57:28 -0700
commit0a6ff60caa27d2117438d0c6750977684252886a (patch)
tree77194a0c93b48197c3f376235c34a4543e8d28c1 /src/arch
parent61edc9ba66f4ce42c7cc4aab0f26d060470cdb14 (diff)
downloadgem5-0a6ff60caa27d2117438d0c6750977684252886a.tar.xz
X86: Recognize and handle the lock legacy prefix.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/decoder/decoder.isa52
-rw-r--r--src/arch/x86/isa/decoder/locked_opcodes.isa199
2 files changed, 228 insertions, 23 deletions
diff --git a/src/arch/x86/isa/decoder/decoder.isa b/src/arch/x86/isa/decoder/decoder.isa
index 20f31f882..dcf6ce089 100644
--- a/src/arch/x86/isa/decoder/decoder.isa
+++ b/src/arch/x86/isa/decoder/decoder.isa
@@ -58,32 +58,38 @@
// The actual decoder specification
//
-decode OPCODE_NUM default Unknown::unknown()
+decode LEGACY_LOCK default Unknown::unknown()
{
- 0x0: M5InternalError::error(
- {{"Saw an ExtMachInst with zero opcode bytes!"}});
- //1 byte opcodes
- ##include "one_byte_opcodes.isa"
- //2 byte opcodes
- ##include "two_byte_opcodes.isa"
- //3 byte opcodes
- 0x3: decode OPCODE_PREFIXA {
- 0xF0: decode OPCODE_PREFIXB {
- //We don't handle these properly in the predecoder yet, so there's
- //no reason to implement them for now.
- 0x38: decode OPCODE_OP {
- default: FailUnimpl::sseThreeEight();
- }
- 0x3A: decode OPCODE_OP {
- default: FailUnimpl::sseThreeA();
- }
- 0xF0: decode OPCODE_OP {
- default: FailUnimpl::threednow();
+ //No lock prefix
+ 0x0: decode OPCODE_NUM default Unknown::unknown()
+ {
+ 0x0: M5InternalError::error(
+ {{"Saw an ExtMachInst with zero opcode bytes!"}});
+ //1 byte opcodes
+ ##include "one_byte_opcodes.isa"
+ //2 byte opcodes
+ ##include "two_byte_opcodes.isa"
+ //3 byte opcodes
+ 0x3: decode OPCODE_PREFIXA {
+ 0xF0: decode OPCODE_PREFIXB {
+ //We don't handle these properly in the predecoder yet, so
+ //there's no reason to implement them for now.
+ 0x38: decode OPCODE_OP {
+ default: FailUnimpl::sseThreeEight();
+ }
+ 0x3A: decode OPCODE_OP {
+ default: FailUnimpl::sseThreeA();
+ }
+ 0xF0: decode OPCODE_OP {
+ default: FailUnimpl::threednow();
+ }
+ default: M5InternalError::error(
+ {{"Unexpected second opcode byte in three byte opcode!"}});
}
default: M5InternalError::error(
- {{"Unexpected second opcode byte in three byte opcode!"}});
+ {{"Unexpected first opcode byte in three byte opcode!"}});
}
- default: M5InternalError::error(
- {{"Unexpected first opcode byte in three byte opcode!"}});
}
+ //Lock prefix
+ ##include "locked_opcodes.isa"
}
diff --git a/src/arch/x86/isa/decoder/locked_opcodes.isa b/src/arch/x86/isa/decoder/locked_opcodes.isa
new file mode 100644
index 000000000..b16fbff04
--- /dev/null
+++ b/src/arch/x86/isa/decoder/locked_opcodes.isa
@@ -0,0 +1,199 @@
+// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
+// All rights reserved.
+//
+// Redistribution and use of this software in source and binary forms,
+// with or without modification, are permitted provided that the
+// following conditions are met:
+//
+// The software must be used only for Non-Commercial Use which means any
+// use which is NOT directed to receiving any direct monetary
+// compensation for, or commercial advantage from such use. Illustrative
+// examples of non-commercial use are academic research, personal study,
+// teaching, education and corporate research & development.
+// Illustrative examples of commercial use are distributing products for
+// commercial advantage and providing services using the software for
+// commercial advantage.
+//
+// If you wish to use this software or functionality therein that may be
+// covered by patents for commercial use, please contact:
+// Director of Intellectual Property Licensing
+// Office of Strategy and Technology
+// Hewlett-Packard Company
+// 1501 Page Mill Road
+// Palo Alto, California 94304
+//
+// Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer. Redistributions
+// in binary form must reproduce the above copyright notice, this list of
+// conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution. Neither the name of
+// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission. No right of
+// sublicense is granted herewith. Derivatives of the software and
+// output created using the software may be prepared, but only for
+// Non-Commercial Uses. Derivatives of the software may be shared with
+// others provided: (i) the others agree to abide by the list of
+// conditions herein which includes the Non-Commercial Use restrictions;
+// and (ii) such Derivatives of the software include the above copyright
+// notice to acknowledge the contribution from this software where
+// applicable, this list of conditions and the disclaimer below.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+
+////////////////////////////////////////////////////////////////////
+//
+// Decode opcodes with the lock prefix. Opcodes which shouldn't have that
+// prefix should effectively decode to UD2.
+//
+
+// All the memory references in these instructions happen through modrm bytes.
+// We therefore only need to make sure the modrm byte encodes a memory
+// reference to make sure these are the memory forms of these instructions.
+0x1: decode MODRM_MOD {
+ format Inst {
+ 0x3: UD2();
+ default: decode OPCODE_NUM {
+ 0x1: decode OPCODE_OP_TOP5 {
+ 0x00: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::ADD_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x01: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::OR_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x02: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::ADC_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x03: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::SBB_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x04: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::AND_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x05: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::SUB_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x06: decode OPCODE_OP_BOTTOM3 {
+ default: MultiInst::XOR_LOCKED(OPCODE_OP_BOTTOM3,
+ [Mb,Gb], [Mv,Gv]);
+ }
+ 0x10: decode OPCODE_OP_BOTTOM3 {
+ 0x0: decode MODRM_REG {
+ 0x0: ADD_LOCKED(Mb,Ib);
+ 0x1: OR_LOCKED(Mb,Ib);
+ 0x2: ADC_LOCKED(Mb,Ib);
+ 0x3: SBB_LOCKED(Mb,Ib);
+ 0x4: AND_LOCKED(Mb,Ib);
+ 0x5: SUB_LOCKED(Mb,Ib);
+ 0x6: XOR_LOCKED(Mb,Ib);
+ }
+ 0x1: decode MODRM_REG {
+ 0x0: ADD_LOCKED(Mv,Iz);
+ 0x1: OR_LOCKED(Mv,Iz);
+ 0x2: ADC_LOCKED(Mv,Iz);
+ 0x3: SBB_LOCKED(Mv,Iz);
+ 0x4: AND_LOCKED(Mv,Iz);
+ 0x5: SUB_LOCKED(Mv,Iz);
+ 0x6: XOR_LOCKED(Mv,Iz);
+ }
+ 0x2: decode MODE_SUBMODE {
+ 0x0: UD2();
+ default: decode MODRM_REG {
+ 0x0: ADD_LOCKED(Mb,Ib);
+ 0x1: OR_LOCKED(Mb,Ib);
+ 0x2: ADC_LOCKED(Mb,Ib);
+ 0x3: SBB_LOCKED(Mb,Ib);
+ 0x4: AND_LOCKED(Mb,Ib);
+ 0x5: SUB_LOCKED(Mb,Ib);
+ 0x6: XOR_LOCKED(Mb,Ib);
+ }
+ }
+ //0x3: group1_Ev_Ib();
+ 0x3: decode MODRM_REG {
+ 0x0: ADD_LOCKED(Mv,Ib);
+ 0x1: OR_LOCKED(Mv,Ib);
+ 0x2: ADC_LOCKED(Mv,Ib);
+ 0x3: SBB_LOCKED(Mv,Ib);
+ 0x4: AND_LOCKED(Mv,Ib);
+ 0x5: SUB_LOCKED(Mv,Ib);
+ 0x6: XOR_LOCKED(Mv,Ib);
+ }
+ 0x6: XCHG_LOCKED(Mb,Gb);
+ 0x7: XCHG_LOCKED(Mv,Gv);
+ }
+ 0x1E: decode OPCODE_OP_BOTTOM3 {
+ //0x6: group3_Eb();
+ 0x6: decode MODRM_REG {
+ 0x2: NOT_LOCKED(Mb);
+ 0x3: NEG_LOCKED(Mb);
+ }
+ //0x7: group3_Ev();
+ 0x7: decode MODRM_REG {
+ 0x2: NOT_LOCKED(Mv);
+ 0x3: NEG_LOCKED(Mv);
+ }
+ }
+ 0x1F: decode OPCODE_OP_BOTTOM3 {
+ 0x6: decode MODRM_REG {
+ 0x0: INC_LOCKED(Mb);
+ 0x1: DEC_LOCKED(Mb);
+ default: UD2();
+ }
+ //0x7: group5();
+ 0x7: decode MODRM_REG {
+ 0x0: INC_LOCKED(Mv);
+ 0x1: DEC_LOCKED(Mv);
+ }
+ }
+ }
+ 0x2: decode OPCODE_PREFIXA {
+ 0x0F: decode OPCODE_OP_TOP5 {
+ 0x15: decode OPCODE_OP_BOTTOM3 {
+ 0x3: BTS_LOCKED(Mv,Gv);
+ }
+ 0x16: decode OPCODE_OP_BOTTOM3 {
+ 0x0: CMPXCHG_LOCKED(Mb,Gb);
+ 0x1: CMPXCHG_LOCKED(Mv,Gv);
+ 0x3: BTR_LOCKED(Mv,Gv);
+ }
+ 0x17: decode OPCODE_OP_BOTTOM3 {
+ 0x2: decode MODRM_REG {
+ 0x5: BTS_LOCKED(Mv,Ib);
+ 0x6: BTR_LOCKED(Mv,Ib);
+ 0x7: BTC_LOCKED(Mv,Ib);
+ }
+ 0x3: BTC_LOCKED(Mv,Gv);
+ }
+ 0x18: decode OPCODE_OP_BOTTOM3 {
+ 0x0: XADD_LOCKED(Mb,Gb);
+ 0x1: XADD_LOCKED(Mv,Gv);
+ //0x7: group9();
+ 0x7: decode MODRM_REG {
+ 0x1: WarnUnimpl::cmpxchg_Mq_LOCKED();
+ }
+ }
+ }
+ default: M5InternalError::error(
+ {{"Unexpected first opcode byte in two byte opcode!"}});
+ }
+ }
+ }
+}