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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 04:14:16 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 04:14:16 -0700
commit93cccf7d198c8bf6a53481bc34ca9c19b1503196 (patch)
treee50a6753f8a70810e66347be3602259effdfc573 /src/arch
parentf82c1232427b744609fe8bfaa398a69ceaf3a068 (diff)
downloadgem5-93cccf7d198c8bf6a53481bc34ca9c19b1503196.tar.xz
X86: Make the TEST instruction set all the flags it's supposed to.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
index 2b4bf7b9a..0423fb5dd 100644
--- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
+++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/test.py
@@ -57,26 +57,26 @@ microcode = '''
def macroop TEST_M_R
{
ld t1, seg, sib, disp
- and t0, t1, reg, flags=(SF, ZF, PF)
+ and t0, t1, reg, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_P_R
{
rdip t7
ld t1, seg, riprel, disp
- and t0, t1, reg, flags=(SF, ZF, PF)
+ and t0, t1, reg, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_R_R
{
- and t0, reg, regm, flags=(SF, ZF, PF)
+ and t0, reg, regm, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_M_I
{
ld t1, seg, sib, disp
limm t2, imm
- and t0, t1, t2, flags=(SF, ZF, PF)
+ and t0, t1, t2, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_P_I
@@ -84,12 +84,12 @@ def macroop TEST_P_I
rdip t7
ld t1, seg, riprel, disp
limm t2, imm
- and t0, t1, t2, flags=(SF, ZF, PF)
+ and t0, t1, t2, flags=(OF, SF, ZF, PF, CF)
};
def macroop TEST_R_I
{
limm t1, imm
- and t0, reg, t1, flags=(SF, ZF, PF)
+ and t0, reg, t1, flags=(OF, SF, ZF, PF, CF)
};
'''