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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 12:53:01 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 12:53:01 -0500 |
| commit | fe737603881f620da2c4b14f18158c20487c9960 (patch) | |
| tree | 9af95d4072ed2c4d4ff9dd1b169883022a0f6b19 /src/arch | |
| parent | fa4293af33e48e9e9374dada5a8efcd0c41554a4 (diff) | |
| download | gem5-fe737603881f620da2c4b14f18158c20487c9960.tar.xz | |
Compiler error fix.
--HG--
extra : convert_revision : 39e2638a10bf3e821e8f3d4d8c664008c98fc921
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/sparc/tlb.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 8a4ccd69f..b35f472cf 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -111,7 +111,7 @@ class TLB : public SimObject void writeSfsr(ThreadContext *tc, int reg, bool write, ContextType ct, bool se, FaultTypes ft, int asi); - void TLB::clearUsedBits(); + void clearUsedBits(); void writeTagAccess(ThreadContext *tc, int reg, Addr va, int context); |