ISA,CPU: Generalize and split out the components of the decode cache.

This will allow it to be specialized by the ISAs. The existing caching scheme
is provided by the BasicDecodeCache in the GenericISA namespace and is built
from the generalized components.

--HG--
rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc

15 files changed, 202 insertions, 28 deletions

diff --git a/src/arch/alpha/decoder.cc b/src/arch/alpha/decoder.cc
index 8cabe515d..e5a7663ff 100644
--- a/src/arch/alpha/decoder.cc
+++ b/src/arch/alpha/decoder.cc
@@ -33,6 +33,6 @@
 namespace AlphaISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/alpha/decoder.hh b/src/arch/alpha/decoder.hh
index 4233c2d44..ef2f5856c 100644
--- a/src/arch/alpha/decoder.hh
+++ b/src/arch/alpha/decoder.hh
@@ -31,11 +31,13 @@
 #ifndef __ARCH_ALPHA_DECODER_HH__
 #define __ARCH_ALPHA_DECODER_HH__
 
+#include "arch/generic/decode_cache.hh"
 #include "arch/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
 #include "sim/full_system.hh"
 
+class ThreadContext;
+
 namespace AlphaISA
 {
 
@@ -99,7 +101,7 @@ class Decoder
 
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 65badbc49..4001f7597 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -38,7 +38,7 @@
 namespace ArmISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 void
 Decoder::process()
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index dd51fd082..a5f2c88a5 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -35,8 +35,9 @@
 
 #include "arch/arm/miscregs.hh"
 #include "arch/arm/types.hh"
+#include "arch/generic/decode_cache.hh"
 #include "base/types.hh"
-#include "cpu/decode_cache.hh"
+#include "cpu/static_inst.hh"
 
 class ThreadContext;
 
@@ -122,7 +123,7 @@ class Decoder
 
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
diff --git a/src/arch/generic/SConscript b/src/arch/generic/SConscript
new file mode 100644
index 000000000..f2edc805d
--- /dev/null
+++ b/src/arch/generic/SConscript
@@ -0,0 +1,31 @@
+# Copyright (c) 2012 Google
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+Import('*')
+
+Source('decode_cache.cc')
diff --git a/src/arch/generic/decode_cache.cc b/src/arch/generic/decode_cache.cc
new file mode 100644
index 000000000..7211ba355
--- /dev/null
+++ b/src/arch/generic/decode_cache.cc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2011-2012 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/generic/decode_cache.hh"
+#include "arch/decoder.hh"
+#include "arch/types.hh"
+#include "config/the_isa.hh"
+#include "cpu/static_inst.hh"
+
+namespace GenericISA
+{
+
+StaticInstPtr
+BasicDecodeCache::decode(TheISA::Decoder *decoder,
+        TheISA::ExtMachInst mach_inst, Addr addr)
+{
+    StaticInstPtr &si = decodePages.lookup(addr);
+    if (si && (si->machInst == mach_inst))
+        return si;
+
+    DecodeCache::InstMap::iterator iter = instMap.find(mach_inst);
+    if (iter != instMap.end()) {
+        si = iter->second;
+        return si;
+    }
+
+    si = decoder->decodeInst(mach_inst);
+    instMap[mach_inst] = si;
+    return si;
+}
+
+} // namespace GenericISA
diff --git a/src/arch/generic/decode_cache.hh b/src/arch/generic/decode_cache.hh
new file mode 100644
index 000000000..c6bce7226
--- /dev/null
+++ b/src/arch/generic/decode_cache.hh
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2011 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_GENERIC_DECODE_CACHE_HH__
+#define __ARCH_GENERIC_DECODE_CACHE_HH__
+
+#include "arch/types.hh"
+#include "config/the_isa.hh"
+#include "cpu/decode_cache.hh"
+#include "cpu/static_inst_fwd.hh"
+
+namespace TheISA
+{
+    class Decoder;
+}
+
+namespace GenericISA
+{
+
+class BasicDecodeCache
+{
+  private:
+    DecodeCache::InstMap instMap;
+    DecodeCache::AddrMap<StaticInstPtr> decodePages;
+
+  public:
+    /// Decode a machine instruction.
+    /// @param mach_inst The binary instruction to decode.
+    /// @retval A pointer to the corresponding StaticInst object.
+    StaticInstPtr decode(TheISA::Decoder * const decoder,
+            TheISA::ExtMachInst mach_inst, Addr addr);
+};
+
+} // namespace GenericISA
+
+#endif // __ARCH_GENERIC_DECODE_CACHE_HH__
diff --git a/src/arch/mips/decoder.cc b/src/arch/mips/decoder.cc
index 45b1f7184..dd4ba2be1 100644
--- a/src/arch/mips/decoder.cc
+++ b/src/arch/mips/decoder.cc
@@ -33,6 +33,6 @@
 namespace MipsISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 95385961d..4857eb353 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -31,11 +31,11 @@
 #ifndef __ARCH_MIPS_DECODER_HH__
 #define __ARCH_MIPS_DECODER_HH__
 
+#include "arch/generic/decode_cache.hh"
 #include "arch/mips/types.hh"
 #include "base/misc.hh"
 #include "base/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
 
 class ThreadContext;
 
@@ -99,7 +99,7 @@ class Decoder
 
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
diff --git a/src/arch/power/decoder.cc b/src/arch/power/decoder.cc
index 96fd9297b..1a6a3b38f 100644
--- a/src/arch/power/decoder.cc
+++ b/src/arch/power/decoder.cc
@@ -33,6 +33,6 @@
 namespace PowerISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index c45473a90..60fc8ca75 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -31,9 +31,11 @@
 #ifndef __ARCH_POWER_DECODER_HH__
 #define __ARCH_POWER_DECODER_HH__
 
+#include "arch/generic/decode_cache.hh"
 #include "arch/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
+
+class ThreadContext;
 
 namespace PowerISA
 {
@@ -105,7 +107,7 @@ class Decoder
     }
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
diff --git a/src/arch/sparc/decoder.cc b/src/arch/sparc/decoder.cc
index e8769a573..a7f7704ad 100644
--- a/src/arch/sparc/decoder.cc
+++ b/src/arch/sparc/decoder.cc
@@ -33,6 +33,6 @@
 namespace SparcISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 999a605a7..ea0793286 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -31,10 +31,10 @@
 #ifndef __ARCH_SPARC_DECODER_HH__
 #define __ARCH_SPARC_DECODER_HH__
 
+#include "arch/generic/decode_cache.hh"
 #include "arch/sparc/registers.hh"
 #include "arch/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
 #include "cpu/thread_context.hh"
 
 class ThreadContext;
@@ -109,7 +109,7 @@ class Decoder
 
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
diff --git a/src/arch/x86/decoder.cc b/src/arch/x86/decoder.cc
index d7199fa82..5fb2dcaf4 100644
--- a/src/arch/x86/decoder.cc
+++ b/src/arch/x86/decoder.cc
@@ -408,6 +408,25 @@ Decoder::State Decoder::doImmediateState()
     return nextState;
 }
 
-DecodeCache Decoder::defaultCache;
+DecodeCache::InstMap Decoder::instMap;
+DecodeCache::AddrMap<StaticInstPtr> Decoder::decodePages;
+
+StaticInstPtr
+Decoder::decode(ExtMachInst mach_inst, Addr addr)
+{
+    StaticInstPtr &si = decodePages.lookup(addr);
+    if (si && (si->machInst == mach_inst))
+        return si;
+
+    DecodeCache::InstMap::iterator iter = instMap.find(mach_inst);
+    if (iter != instMap.end()) {
+        si = iter->second;
+        return si;
+    }
+
+    si = decodeInst(mach_inst);
+    instMap[mach_inst] = si;
+    return si;
+}
 
 }
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 300e2238c..725d443d6 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -40,7 +40,7 @@
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
 #include "debug/Decoder.hh"
 
 class ThreadContext;
@@ -218,8 +218,9 @@ class Decoder
     }
 
   protected:
-    /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    /// Caching for decoded instruction objects.
+    static DecodeCache::InstMap instMap;
+    static DecodeCache::AddrMap<StaticInstPtr> decodePages;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
@@ -227,11 +228,7 @@ class Decoder
     /// Decode a machine instruction.
     /// @param mach_inst The binary instruction to decode.
     /// @retval A pointer to the corresponding StaticInst object.
-    StaticInstPtr
-    decode(ExtMachInst mach_inst, Addr addr)
-    {
-        return defaultCache.decode(this, mach_inst, addr);
-    }
+    StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
 
     StaticInstPtr
     decode(X86ISA::PCState &nextPC)