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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:03 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:03 -0500
commit7b62e9ad7180bd6365c096040114a2f1dfc19fa8 (patch)
treec534b5d047529627f9e4793f5ba51d16733a44ca /src/arch
parent8fadf2691d8e2724c1bd175c2f505786a50bf12e (diff)
downloadgem5-7b62e9ad7180bd6365c096040114a2f1dfc19fa8.tar.xz
ARM: Make macroops panic if executed directly.
The macroop should never be executed, only it's microops will.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/isa/insts/macromem.isa1
-rw-r--r--src/arch/arm/isa/templates/macromem.isa20
2 files changed, 1 insertions, 20 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index b6d6b6b5d..3e466c70d 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -127,5 +127,4 @@ let {{
iop = InstObjParams("ldmstm", "LdmStm", 'PredMacroOp', "", [])
header_output = MacroMemDeclare.subst(iop)
decoder_output = MacroMemConstructor.subst(iop)
- exec_output = MacroMemExecute.subst(iop)
}};
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa
index c474da0c8..c626bdec8 100644
--- a/src/arch/arm/isa/templates/macromem.isa
+++ b/src/arch/arm/isa/templates/macromem.isa
@@ -116,7 +116,7 @@ class %(class_name)s : public %(base_class)s
%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
bool index, bool up, bool user, bool writeback, bool load,
uint32_t reglist);
- %(BasicExecDeclare)s
+ %(BasicExecPanic)s
};
}};
@@ -192,21 +192,3 @@ inline %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
}
}};
-
-def template MacroMemExecute {{
-Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
-{
- Fault fault = NoFault;
-
- %(fp_enable_check)s;
- %(op_decl)s;
- %(op_rd)s;
- %(code)s;
- if (fault == NoFault)
- {
- %(op_wb)s;
- }
-
- return fault;
-}
-}};