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authorGabe Black <gblack@eecs.umich.edu>2007-07-26 22:13:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-26 22:13:14 -0700
commitd1e533a1e243b75b3257e2f96deb385a3b10e09b (patch)
tree5cde70506a663c83efceced11273cca47fed9586 /src/arch
parent876849724d0e5a990018dc025a8166c5131be567 (diff)
downloadgem5-d1e533a1e243b75b3257e2f96deb385a3b10e09b.tar.xz
X86: Fix argument register indexing.
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg. --HG-- extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/freebsd/system.cc5
-rw-r--r--src/arch/alpha/isa_traits.hh12
-rw-r--r--src/arch/mips/isa_traits.hh10
-rw-r--r--src/arch/sparc/isa_traits.hh12
-rw-r--r--src/arch/sparc/process.cc10
-rw-r--r--src/arch/x86/isa_traits.hh17
-rw-r--r--src/arch/x86/process.cc5
7 files changed, 38 insertions, 33 deletions
diff --git a/src/arch/alpha/freebsd/system.cc b/src/arch/alpha/freebsd/system.cc
index db0be29ab..f666de604 100644
--- a/src/arch/alpha/freebsd/system.cc
+++ b/src/arch/alpha/freebsd/system.cc
@@ -76,8 +76,9 @@ FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc)
Addr ppc_vaddr = 0;
Addr timer_vaddr = 0;
- ppc_vaddr = (Addr)tc->readIntReg(ArgumentReg1);
- timer_vaddr = (Addr)tc->readIntReg(ArgumentReg2);
+ assert(NumArgumentRegs >= 3);
+ ppc_vaddr = (Addr)tc->readIntReg(ArgumentReg[1]);
+ timer_vaddr = (Addr)tc->readIntReg(ArgumentReg[2]);
virtPort.write(ppc_vaddr, (uint32_t)Clock::Frequency);
virtPort.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index a267ac034..7dc7e5151 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -156,14 +156,12 @@ namespace AlphaISA
const int ReturnAddressReg = 26;
const int ReturnValueReg = 0;
const int FramePointerReg = 15;
- const int ArgumentReg0 = 16;
- const int ArgumentReg1 = 17;
- const int ArgumentReg2 = 18;
- const int ArgumentReg3 = 19;
- const int ArgumentReg4 = 20;
- const int ArgumentReg5 = 21;
+
+ const int ArgumentReg[] = {16, 17, 18, 19, 20, 21};
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
const int SyscallNumReg = ReturnValueReg;
- const int SyscallPseudoReturnReg = ArgumentReg4;
+ const int SyscallPseudoReturnReg = ArgumentReg[4];
const int SyscallSuccessReg = 19;
const int LogVMPageSize = 13; // 8K bytes
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 5ab6957a3..5d4403553 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -74,10 +74,10 @@ namespace MipsISA
const int ReturnValueReg = 2;
const int ReturnValueReg1 = 2;
const int ReturnValueReg2 = 3;
- const int ArgumentReg0 = 4;
- const int ArgumentReg1 = 5;
- const int ArgumentReg2 = 6;
- const int ArgumentReg3 = 7;
+
+ const int ArgumentReg[] = {4, 5, 6, 7};
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
const int KernelReg0 = 26;
const int KernelReg1 = 27;
const int GlobalPointerReg = 28;
@@ -87,7 +87,7 @@ namespace MipsISA
const int SyscallNumReg = ReturnValueReg1;
const int SyscallPseudoReturnReg = ReturnValueReg2;
- const int SyscallSuccessReg = ArgumentReg3;
+ const int SyscallSuccessReg = ArgumentReg[3];
const int LogVMPageSize = 13; // 8K bytes
const int VMPageSize = (1 << LogVMPageSize);
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 8b3ec36a6..0edbdec4b 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -69,14 +69,12 @@ namespace SparcISA
const int ReturnAddressReg = 31; // post call, precall is 15
const int ReturnValueReg = 8; // Post return, 24 is pre-return.
const int FramePointerReg = 30;
- const int ArgumentReg0 = 8;
- const int ArgumentReg1 = 9;
- const int ArgumentReg2 = 10;
- const int ArgumentReg3 = 11;
- const int ArgumentReg4 = 12;
- const int ArgumentReg5 = 13;
+
+ const int ArgumentReg[] = {8, 9, 10, 11, 12, 13};
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
// Some OS syscall use a second register (o1) to return a second value
- const int SyscallPseudoReturnReg = ArgumentReg1;
+ const int SyscallPseudoReturnReg = ArgumentReg[1];
//XXX These numbers are bogus
const int MaxInstSrcRegs = 8;
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 0776694ec..bc950301a 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -399,8 +399,9 @@ Sparc64LiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler64, spillSize);
//Set up the thread context to start running the process
- threadContexts[0]->setIntReg(ArgumentReg0, argc);
- threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
+ assert(NumArgumentRegs >= 2);
+ threadContexts[0]->setIntReg(ArgumentReg[0], argc);
+ threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
Addr prog_entry = objFile->entryPoint();
@@ -627,8 +628,9 @@ Sparc32LiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(spillStart, (uint8_t*)spillHandler32, spillSize);
//Set up the thread context to start running the process
- //threadContexts[0]->setIntReg(ArgumentReg0, argc);
- //threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
+ //assert(NumArgumentRegs >= 2);
+ //threadContexts[0]->setIntReg(ArgumentReg[0], argc);
+ //threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min);
uint32_t prog_entry = objFile->entryPoint();
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 4c02ee35e..63bcfead9 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -99,12 +99,17 @@ namespace X86ISA
const int ReturnAddressReg = 0;
const int ReturnValueReg = INTREG_RAX;
const int FramePointerReg = INTREG_RBP;
- const int ArgumentReg0 = INTREG_RDI;
- const int ArgumentReg1 = INTREG_RSI;
- const int ArgumentReg2 = INTREG_RDX;
- const int ArgumentReg3 = INTREG_RCX;
- const int ArgumentReg4 = INTREG_R8W;
- const int ArgumentReg5 = INTREG_R9W;
+ const int ArgumentReg[] = {
+ INTREG_RDI,
+ INTREG_RSI,
+ INTREG_RDX,
+ //This argument register is r10 for syscalls and rcx for C.
+ INTREG_R10W,
+ //INTREG_RCX,
+ INTREG_R8W,
+ INTREG_R9W
+ };
+ const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
// Some OS syscalls use a second register (rdx) to return a second
// value
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 7deb54945..09962fdb6 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -338,8 +338,9 @@ X86LiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
//Set up the thread context to start running the process
- threadContexts[0]->setIntReg(ArgumentReg0, argc);
- threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
+ assert(NumArgumentRegs >= 2);
+ threadContexts[0]->setIntReg(ArgumentReg[0], argc);
+ threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min);
Addr prog_entry = objFile->entryPoint();