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authorCurtis Dunham <Curtis.Dunham@arm.com>2017-05-22 19:22:14 +0000
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-07-05 14:24:03 +0000
commite1c8c1f8603672823c89e5ed4c98502350c600d6 (patch)
tree8d8c921888ab7eaaeb9a14be6e0ec51445689854 /src/arch
parente2a049e089b4878d6abd8e816973b175e2be2d7c (diff)
downloadgem5-e1c8c1f8603672823c89e5ed4c98502350c600d6.tar.xz
dev,arm: add Kvm mode of operation for CP15 timer
The timer device exposed via the ARM ISA, also known as the "CP15 timer" due to its legacy coprocessor encodings, is implemented by the GenericTimerISA class. During Kvm execution, however, this functionality is directly emulated by the hardware. This commit subclasses the GenericTimer, which is (solely) used by GenericTimerISA, to facilitate Kvm in much the same way as the prior GIC changes: the gem5 model is used as the backing store for state, so checkpointing and CPU switching work correctly, but isn't used during Kvm execution. The added indirection prevents the timer device from creating events when we're just updating its state, but not actually using it for simulation. Change-Id: I427540d11ccf049c334afe318f575146aa888672 Reviewed-on: https://gem5-review.googlesource.com/3542 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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