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authorGabe Black <gabeblack@google.com>2019-04-27 20:37:13 -0700
committerGabe Black <gabeblack@google.com>2019-04-30 02:51:59 +0000
commit2268d07623910dbab50ae0f80e93068acb25cfa9 (patch)
tree33f26d7fe06d9ae9490c5937f9b0d95f180445d3 /src/arch
parent081da0f51882e54d5218d3c645c30b236315061c (diff)
downloadgem5-2268d07623910dbab50ae0f80e93068acb25cfa9.tar.xz
alpha: Add some control registers to the ISA operands list.
These will be used in the in-ISA HWREI implementation. Change-Id: Ia9f7bf1aa2dbd764c878911c2cba680840397c62 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18430 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/isa/main.isa3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index 646286605..f77b1f9c9 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -76,6 +76,7 @@ output exec {{
#include <cmath>
#include "arch/alpha/decoder.hh"
+#include "arch/alpha/kernel_stats.hh"
#include "arch/alpha/registers.hh"
#include "arch/alpha/regredir.hh"
#include "arch/generic/memhelpers.hh"
@@ -198,6 +199,8 @@ def operands {{
'Runiq': ('ControlReg', 'uq', 'MISCREG_UNIQ', None, 1),
'FPCR': ('ControlReg', 'uq', 'MISCREG_FPCR', None, 1),
'IntrFlag': ('ControlReg', 'uq', 'MISCREG_INTR', None, 1),
+ 'LockFlag': ('ControlReg', 'uq', 'MISCREG_LOCKFLAG', None, 1),
+ 'IprExcAddr': ('ControlReg', 'uq', 'IPR_EXC_ADDR', None, 1),
# The next two are hacks for non-full-system call-pal emulation
'R0': ('IntReg', 'uq', '0', None, 1),
'R16': ('IntReg', 'uq', '16', None, 1),