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authorGabe Black <gblack@eecs.umich.edu>2010-08-23 09:44:19 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-08-23 09:44:19 -0700
commit249549f9c3cc9317b1eeca8e844287dbbaf5f4ca (patch)
treefebf73ee01e0e28fa890acf3de4db70e0a8fc549 /src/arch
parentd43eb42d00a587405a512396c6524be95d5a6311 (diff)
downloadgem5-249549f9c3cc9317b1eeca8e844287dbbaf5f4ca.tar.xz
X86: Define a noop ExtMachInst.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa_traits.hh12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index c1036ac01..f67b58788 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -74,6 +74,18 @@ namespace X86ISA
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
+
+ const ExtMachInst NoopMachInst = {
+ 0x0, // No legacy prefixes.
+ 0x0, // No rex prefix.
+ { 1, 0x0, 0x0, 0x90 }, // One opcode byte, 0x90.
+ 0x0, 0x0, // No modrm or sib.
+ 0, 0, // No immediate or displacement.
+ 8, 8, 8, // All sizes are 8.
+ 0, // Displacement size is 0.
+ SixtyFourBitMode // Behave as if we're in 64 bit
+ // mode (this doesn't actually matter).
+ };
};
#endif // __ARCH_X86_ISATRAITS_HH__