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authorGabe Black <gabeblack@google.com>2019-10-13 23:40:04 -0700
committerGabe Black <gabeblack@google.com>2019-10-25 22:42:31 +0000
commit272a43175fc0de46ba1e264b3b1add5ea01d7e5d (patch)
tree8e46034aa4c25d387bd6e2d3d480d4d00bebb768 /src/arch
parenta2a8dac5c2a26e91432415f409b55f04cff9c2e4 (diff)
downloadgem5-272a43175fc0de46ba1e264b3b1add5ea01d7e5d.tar.xz
cpu: Switch off of the CPU's comInstEventQueue.
This switches to letting the ThreadContexts use a thread based/local comInstEventQueue instead of falling back to the CPU's array. Because the implementation is no longer shared and it's not given where the comInstEventQueue (or other implementation) should be accessed, the default implementation has been removed. Also, because nobody is using the CPU's array of event queues, those have been removed. Change-Id: I515e6e00a2174067a928c33ef832bc5c840bdf7f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22110 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/fastmodel/iris/thread_context.hh6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh
index 13ab29c46..c07c642fb 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -96,6 +96,12 @@ class ThreadContext : public ::ThreadContext
bool schedule(PCEvent *e) override { return false; }
bool remove(PCEvent *e) override { return false; }
+ Tick nextInstEventCount() override { return MaxTick; }
+ void serviceInstCountEvents(Tick count) override {}
+ void scheduleInstCountEvent(Event *event, Tick count) override {}
+ void descheduleInstCountEvent(Event *event) override {}
+ Tick getCurrentInstCount() override { return 0; }
+
virtual Counter
totalInsts()
{