summaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorGene Wu <Gene.Wu@arm.com>2010-08-23 11:18:40 -0500
committerGene Wu <Gene.Wu@arm.com>2010-08-23 11:18:40 -0500
commit5486fa66122450ad93b9dd7ddcad64f983b7400d (patch)
tree70829c1300819f33852b285e791718c5091c3529 /src/arch
parenta9931880348d3194be9cbb201a19b52d53d7ee83 (diff)
downloadgem5-5486fa66122450ad93b9dd7ddcad64f983b7400d.tar.xz
ARM: DFSR status value for sync external data abort is expected to be 0x8 in ARMv7
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/faults.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 6de9fee28..f9dc8ac3b 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -75,7 +75,7 @@ class ArmFault : public FaultBase
Translation1 = 0x7,
SynchronousExternalAbort0 = 0x8,
Domain0 = 0x9,
- SynchronousExternalAbort1 = 0xa,
+ SynchronousExternalAbort1 = 0x8,
Domain1 = 0xb,
TranslationTableWalkExtAbt0 = 0xc,
Permission0 = 0xd,