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authorGabe Black <gblack@eecs.umich.edu>2009-08-17 20:25:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-17 20:25:14 -0700
commit7d4db7266ea950bb1af6f74f407cc1e9e11faff6 (patch)
tree397c7e0f5b84b00579a4887042ffc7197c25c26c /src/arch
parent179fd4e536e12cbd1baeefbd9d8ac0557f899003 (diff)
downloadgem5-7d4db7266ea950bb1af6f74f407cc1e9e11faff6.tar.xz
X86: Implement MOVSS.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa4
-rw-r--r--src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py26
2 files changed, 27 insertions, 3 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index dabc1bb75..41cbdd869 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -306,8 +306,8 @@
}
// repe (0xF3)
0x4: decode OPCODE_OP_BOTTOM3 {
- 0x0: WarnUnimpl::movss_Vd_Wd();
- 0x1: WarnUnimpl::movss_Wd_Vd();
+ 0x0: MOVSS(Vd,Wd);
+ 0x1: MOVSS(Wd,Vd);
0x2: WarnUnimpl::movsldup_Vo_Wo();
0x6: WarnUnimpl::movshdup_Vo_Wo();
default: UD2();
diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
index 1a6be6783..1f4044bde 100644
--- a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
@@ -249,7 +249,31 @@ def macroop MOVLHPS_XMM_XMM {
movfp xmmh, xmmlm, dataSize=8
};
-# MOVSS
+def macroop MOVSS_XMM_XMM {
+ movfp xmml, xmmlm, dataSize=4
+};
+
+def macroop MOVSS_XMM_M {
+ lfpimm xmml, 0
+ lfpimm xmmh, 0
+ ldfp xmml, seg, sib, disp, dataSize=4
+};
+
+def macroop MOVSS_XMM_P {
+ rdip t7
+ lfpimm xmml, 0
+ lfpimm xmmh, 0
+ ldfp xmml, seg, riprel, disp, dataSize=4
+};
+
+def macroop MOVSS_M_XMM {
+ stfp xmml, seg, sib, disp, dataSize=4
+};
+
+def macroop MOVSS_P_XMM {
+ rdip t7
+ stfp xmml, seg, riprel, disp, dataSize=4
+};
def macroop MOVSD_XMM_M {
# Zero xmmh