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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:00 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:00 -0500
commitaaa619ea231f003d22cf681dbd90d641f476b84f (patch)
treee77e7889a4024f653cc410f1201ae6b1774b79ce /src/arch
parenta1838f2c791ecef74b9410d0341b96b077f2b503 (diff)
downloadgem5-aaa619ea231f003d22cf681dbd90d641f476b84f.tar.xz
ARM: Add thumb bitfields to the ExtMachInst and the isa definition.
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/isa/bitfields.isa15
-rw-r--r--src/arch/arm/types.hh16
2 files changed, 31 insertions, 0 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa
index 74e8e6e50..c0b64e452 100644
--- a/src/arch/arm/isa/bitfields.isa
+++ b/src/arch/arm/isa/bitfields.isa
@@ -114,3 +114,18 @@ def bitfield PUNWL punwl;
// M5 instructions
def bitfield M5FUNC m5Func;
+// Thumb bitfields
+def bitfield TOPCODE_15_13 topcode15_13;
+def bitfield TOPCODE_13_11 topcode13_11;
+def bitfield TOPCODE_12_11 topcode12_11;
+def bitfield TOPCODE_12_10 topcode12_10;
+def bitfield TOPCODE_11_9 topcode11_9;
+def bitfield TOPCODE_11_8 topcode11_8;
+def bitfield TOPCODE_10_9 topcode10_9;
+def bitfield TOPCODE_10_8 topcode10_8;
+def bitfield TOPCODE_9_6 topcode9_6;
+def bitfield TOPCODE_7 topcode7;
+def bitfield TOPCODE_7_6 topcode7_6;
+def bitfield TOPCODE_7_5 topcode7_5;
+def bitfield TOPCODE_7_4 topcode7_4;
+def bitfield TOPCODE_3_0 topcode3_0;
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index adc90ba5d..b0251e8fa 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -125,6 +125,22 @@ namespace ArmISA
Bitfield<24, 20> punwl;
Bitfield<7, 0> m5Func;
+
+ // 16 bit thumb bitfields
+ Bitfield<15, 13> topcode15_13;
+ Bitfield<13, 11> topcode13_11;
+ Bitfield<12, 11> topcode12_11;
+ Bitfield<12, 10> topcode12_10;
+ Bitfield<11, 9> topcode11_9;
+ Bitfield<11, 8> topcode11_8;
+ Bitfield<10, 9> topcode10_9;
+ Bitfield<10, 8> topcode10_8;
+ Bitfield<9, 6> topcode9_6;
+ Bitfield<7> topcode7;
+ Bitfield<7, 6> topcode7_6;
+ Bitfield<7, 5> topcode7_5;
+ Bitfield<7, 4> topcode7_4;
+ Bitfield<3, 0> topcode3_0;
EndBitUnion(ExtMachInst)
// Shift types for ARM instructions