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authorChun-Chen TK Hsu <chunchenhsu@google.com>2019-09-13 12:43:00 +0800
committerChun-Chen TK Hsu <chunchenhsu@google.com>2019-11-14 00:03:55 +0000
commitc2f2913ff23505ceba82f8e5f044ce032455765b (patch)
tree8eb3fcaba5295e63489017aef852760f18a32699 /src/arch
parentde74605db21f53c9d2b103bb26fe09ddd517866d (diff)
downloadgem5-c2f2913ff23505ceba82f8e5f044ce032455765b.tar.xz
config: Add fastmodel cluster in fs_bigLITTLE.py
One can create a system with ARM FastModels CPU and GICv3 with --cpu-type fastmodel --machine-type VExpressFastmodel options. Currently the FastmodelCluster only supports one CPU. Change-Id: I2e985f08f9df01a703e21441c6f9bc1fbae4a222 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20901 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/fastmodel/GIC/FastModelGIC.py35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/arch/arm/fastmodel/GIC/FastModelGIC.py b/src/arch/arm/fastmodel/GIC/FastModelGIC.py
index 53b7e1a2d..72618b92d 100644
--- a/src/arch/arm/fastmodel/GIC/FastModelGIC.py
+++ b/src/arch/arm/fastmodel/GIC/FastModelGIC.py
@@ -464,3 +464,38 @@ class FastModelGIC(BaseGic):
redistributor = VectorGicv3CommsInitiatorSocket(
'GIC communication initiator')
+
+ def get_redist_bases(self):
+ """
+ The format of reg_base_per_redistributor is
+ '0.0.0.0=0x2c010000,0.0.0.1=0x2c020000...'
+ Return an array of base addresses
+ """
+ redists = self.sc_gic.reg_base_per_redistributor.split(",")
+ # make sure we have at least one redistributor
+ assert len(redists) > 0 and "=" in redists[0]
+ return [ int(r.split('=')[1], 16) for r in redists ]
+
+ def get_addr_ranges(self):
+ """ Return address ranges that should be served by this GIC """
+ sc_gic = self.sc_gic
+ gic_frame_size = 0x10000
+ # Add range of distributor
+ ranges = [AddrRange(sc_gic.reg_base, size=gic_frame_size)]
+ # Add ranges of redistributors
+ redist_frame_size = gic_frame_size * (4 if sc_gic.has_gicv4_1 else 2)
+ ranges += [
+ AddrRange(redist_base, size=redist_frame_size)
+ for redist_base in self.get_redist_bases()
+ ]
+ # Add ranges of ITSs
+ its_bases = [
+ sc_gic.its0_base, sc_gic.its1_base, sc_gic.its2_base,
+ sc_gic.its3_base
+ ]
+ ranges += [
+ AddrRange(its_bases[i], size=2 * gic_frame_size)
+ for i in xrange(sc_gic.its_count)
+ ]
+
+ return ranges