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authorGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:01 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:01 -0800
commitc3d41a2def15cdaf2ac3984315f452dacc6a0884 (patch)
tree5324ebec3add54b934a841eee901983ac3463a7f /src/arch
parentda2a4acc26ba264c3c4a12495776fd6a1c4fb133 (diff)
parent4acca8a0536d4445ed25b67edf571ae460446ab9 (diff)
downloadgem5-c3d41a2def15cdaf2ac3984315f452dacc6a0884.tar.xz
Merge with the main repo.
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/alpha/freebsd/system.cc8
-rw-r--r--src/arch/alpha/linux/process.cc6
-rw-r--r--src/arch/alpha/linux/system.cc26
-rw-r--r--src/arch/alpha/linux/system.hh7
-rw-r--r--src/arch/alpha/linux/threadinfo.hh2
-rw-r--r--src/arch/alpha/remote_gdb.cc10
-rw-r--r--src/arch/alpha/remote_gdb.hh2
-rw-r--r--src/arch/alpha/stacktrace.cc12
-rw-r--r--src/arch/alpha/system.cc50
-rw-r--r--src/arch/alpha/system.hh6
-rw-r--r--src/arch/alpha/tru64/process.cc18
-rw-r--r--src/arch/alpha/tru64/system.cc6
-rw-r--r--src/arch/alpha/utility.cc4
-rw-r--r--src/arch/alpha/vtophys.cc6
-rw-r--r--src/arch/alpha/vtophys.hh4
-rw-r--r--src/arch/arm/linux/process.cc12
-rw-r--r--src/arch/arm/linux/system.cc40
-rw-r--r--src/arch/arm/process.cc1
-rw-r--r--src/arch/arm/stacktrace.cc6
-rw-r--r--src/arch/arm/system.cc34
-rw-r--r--src/arch/arm/system.hh5
-rw-r--r--src/arch/arm/utility.cc4
-rw-r--r--src/arch/arm/vtophys.cc4
-rw-r--r--src/arch/mips/linux/process.cc6
-rw-r--r--src/arch/mips/linux/system.cc81
-rw-r--r--src/arch/mips/linux/threadinfo.hh2
-rw-r--r--src/arch/mips/stacktrace.cc10
-rwxr-xr-xsrc/arch/mips/system.cc62
-rw-r--r--src/arch/mips/utility.cc7
-rwxr-xr-xsrc/arch/mips/vtophys.cc1
-rw-r--r--src/arch/power/linux/process.cc2
-rw-r--r--src/arch/power/process.cc1
-rw-r--r--src/arch/sparc/linux/syscalls.cc8
-rw-r--r--src/arch/sparc/process.cc5
-rw-r--r--src/arch/sparc/solaris/process.cc2
-rw-r--r--src/arch/sparc/system.cc39
-rw-r--r--src/arch/sparc/system.hh14
-rw-r--r--src/arch/sparc/utility.cc4
-rw-r--r--src/arch/sparc/vtophys.cc4
-rw-r--r--src/arch/x86/bios/intelmp.cc156
-rw-r--r--src/arch/x86/bios/intelmp.hh24
-rw-r--r--src/arch/x86/bios/smbios.cc78
-rw-r--r--src/arch/x86/bios/smbios.hh10
-rw-r--r--src/arch/x86/interrupts.cc22
-rw-r--r--src/arch/x86/interrupts.hh4
-rw-r--r--src/arch/x86/linux/syscalls.cc12
-rw-r--r--src/arch/x86/linux/system.cc12
-rw-r--r--src/arch/x86/pagetable_walker.cc11
-rw-r--r--src/arch/x86/pagetable_walker.hh14
-rw-r--r--src/arch/x86/process.cc1
-rw-r--r--src/arch/x86/stacktrace.cc14
-rw-r--r--src/arch/x86/system.cc43
52 files changed, 393 insertions, 529 deletions
diff --git a/src/arch/alpha/freebsd/system.cc b/src/arch/alpha/freebsd/system.cc
index 6c7da711f..81aea8696 100644
--- a/src/arch/alpha/freebsd/system.cc
+++ b/src/arch/alpha/freebsd/system.cc
@@ -41,9 +41,7 @@
#include "arch/vtophys.hh"
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh"
-#include "mem/physical.hh"
-#include "mem/port.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/byteswap.hh"
#define TIMER_FREQUENCY 1193180
@@ -78,8 +76,8 @@ FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc)
ppc_vaddr = (Addr)tc->readIntReg(17);
timer_vaddr = (Addr)tc->readIntReg(18);
- virtPort->write(ppc_vaddr, (uint32_t)SimClock::Frequency);
- virtPort->write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
+ virtProxy->write(ppc_vaddr, (uint32_t)SimClock::Frequency);
+ virtProxy->write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
}
void
diff --git a/src/arch/alpha/linux/process.cc b/src/arch/alpha/linux/process.cc
index 97df1feca..f4457b389 100644
--- a/src/arch/alpha/linux/process.cc
+++ b/src/arch/alpha/linux/process.cc
@@ -56,7 +56,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "alpha");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -78,7 +78,7 @@ osf_getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
TypedBufferArg<uint64_t> fpcr(bufPtr);
// I don't think this exactly matches the HW FPCR
*fpcr = 0;
- fpcr.copyOut(tc->getMemPort());
+ fpcr.copyOut(tc->getMemProxy());
return 0;
}
@@ -106,7 +106,7 @@ osf_setsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
case 14: { // SSI_IEEE_FP_CONTROL
TypedBufferArg<uint64_t> fpcr(bufPtr);
// I don't think this exactly matches the HW FPCR
- fpcr.copyIn(tc->getMemPort());
+ fpcr.copyIn(tc->getMemProxy());
DPRINTFR(SyscallVerbose, "osf_setsysinfo(SSI_IEEE_FP_CONTROL): "
" setting FPCR to 0x%x\n", gtoh(*(uint64_t*)fpcr));
return 0;
diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc
index e662ef9ce..6f3cf6b32 100644
--- a/src/arch/alpha/linux/system.cc
+++ b/src/arch/alpha/linux/system.cc
@@ -63,6 +63,17 @@ using namespace Linux;
LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
: AlphaSystem(p)
{
+}
+
+void
+LinuxAlphaSystem::initState()
+{
+ // Moved from the constructor to here since it relies on the
+ // address map being resolved in the interconnect
+
+ // Call the initialisation of the super class
+ AlphaSystem::initState();
+
Addr addr = 0;
/**
@@ -77,8 +88,9 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* Since we aren't using a bootloader, we have to copy the
* kernel arguments directly into the kernel's memory.
*/
- virtPort->writeBlob(CommandLine(), (uint8_t*)params()->boot_osflags.c_str(),
- params()->boot_osflags.length()+1);
+ virtProxy->writeBlob(CommandLine(),
+ (uint8_t*)params()->boot_osflags.c_str(),
+ params()->boot_osflags.length()+1);
/**
* find the address of the est_cycle_freq variable and insert it
@@ -86,8 +98,8 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* calculated it by using the PIT, RTC, etc.
*/
if (kernelSymtab->findAddress("est_cycle_freq", addr))
- virtPort->write(addr, (uint64_t)(SimClock::Frequency /
- p->boot_cpu_frequency));
+ virtProxy->write(addr, (uint64_t)(SimClock::Frequency /
+ params()->boot_cpu_frequency));
/**
@@ -97,7 +109,7 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* 255 ASNs.
*/
if (kernelSymtab->findAddress("dp264_mv", addr))
- virtPort->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
+ virtProxy->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
else
panic("could not find dp264_mv\n");
@@ -164,9 +176,9 @@ LinuxAlphaSystem::setDelayLoop(ThreadContext *tc)
if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
Tick cpuFreq = tc->getCpuPtr()->frequency();
assert(intrFreq);
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
}
}
diff --git a/src/arch/alpha/linux/system.hh b/src/arch/alpha/linux/system.hh
index 3e4de7b2a..5436a27b2 100644
--- a/src/arch/alpha/linux/system.hh
+++ b/src/arch/alpha/linux/system.hh
@@ -128,7 +128,14 @@ class LinuxAlphaSystem : public AlphaSystem
LinuxAlphaSystem(Params *p);
~LinuxAlphaSystem();
+ /**
+ * Initialise the system
+ */
+ virtual void initState();
+
void setDelayLoop(ThreadContext *tc);
+
+ const Params *params() const { return (const Params *)_params; }
};
#endif // __ARCH_ALPHA_LINUX_SYSTEM_HH__
diff --git a/src/arch/alpha/linux/threadinfo.hh b/src/arch/alpha/linux/threadinfo.hh
index 6144cb773..262da9007 100644
--- a/src/arch/alpha/linux/threadinfo.hh
+++ b/src/arch/alpha/linux/threadinfo.hh
@@ -78,7 +78,7 @@ class ThreadInfo
if (!addr)
addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
- FunctionalPort *p = tc->getPhysPort();
+ PortProxy* p = tc->getPhysProxy();
p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
return sp & ~ULL(0x3fff);
diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index 4b285e7ec..aaf9ecb3c 100644
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -188,7 +188,7 @@ RemoteGDB::acc(Addr va, size_t len)
Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20);
PageTableEntry pte =
- kernel_pte_lookup(context->getPhysPort(), ptbr, va);
+ kernel_pte_lookup(context->getPhysProxy(), ptbr, va);
if (!pte.valid()) {
DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
return false;
@@ -312,3 +312,11 @@ RemoteGDB::write(Addr vaddr, size_t size, const char *data)
}
}
+
+bool
+RemoteGDB::insertHardBreak(Addr addr, size_t len)
+{
+ warn_once("Breakpoints do not work in Alpha PAL mode.\n"
+ " See PCEventQueue::doService() in cpu/pc_event.cc.\n");
+ return BaseRemoteGDB::insertHardBreak(addr, len);
+}
diff --git a/src/arch/alpha/remote_gdb.hh b/src/arch/alpha/remote_gdb.hh
index b7aef5f64..7223fea55 100644
--- a/src/arch/alpha/remote_gdb.hh
+++ b/src/arch/alpha/remote_gdb.hh
@@ -63,6 +63,8 @@ class RemoteGDB : public BaseRemoteGDB
bool acc(Addr addr, size_t len);
bool write(Addr addr, size_t size, const char *data);
+ virtual bool insertHardBreak(Addr addr, size_t len);
+
public:
RemoteGDB(System *system, ThreadContext *context);
};
diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc
index 9744d56d1..e83827630 100644
--- a/src/arch/alpha/stacktrace.cc
+++ b/src/arch/alpha/stacktrace.cc
@@ -37,7 +37,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace std;
@@ -48,7 +48,7 @@ ProcessInfo::ProcessInfo(ThreadContext *_tc)
: tc(_tc)
{
Addr addr = 0;
- VirtualPort *vp = tc->getVirtPort();
+ FSTranslatingPortProxy* vp = tc->getVirtProxy();
SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
if (!symtab->findAddress("thread_info_size", addr))
@@ -81,9 +81,9 @@ ProcessInfo::task(Addr ksp) const
Addr tsk;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
tsk = vp->readGtoH<Addr>(base + task_off);
return tsk;
@@ -98,9 +98,9 @@ ProcessInfo::pid(Addr ksp) const
uint16_t pd;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
pd = vp->readGtoH<uint16_t>(task + pid_off);
return pd;
diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc
index f1afda76e..656ab4d6f 100644
--- a/src/arch/alpha/system.cc
+++ b/src/arch/alpha/system.cc
@@ -38,8 +38,7 @@
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "debug/Loader.hh"
-#include "mem/physical.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "params/AlphaSystem.hh"
#include "sim/byteswap.hh"
@@ -64,11 +63,30 @@ AlphaSystem::AlphaSystem(Params *p)
pal = createObjectFile(params()->pal);
if (pal == NULL)
fatal("Could not load PALcode file %s", params()->pal);
+}
+
+AlphaSystem::~AlphaSystem()
+{
+ delete consoleSymtab;
+ delete console;
+ delete pal;
+#ifdef DEBUG
+ delete consolePanicEvent;
+#endif
+}
+
+void
+AlphaSystem::initState()
+{
+ // Moved from the constructor to here since it relies on the
+ // address map being resolved in the interconnect
+ // Call the initialisation of the super class
+ System::initState();
// Load program sections into memory
- pal->loadSections(functionalPort, loadAddrMask);
- console->loadSections(functionalPort, loadAddrMask);
+ pal->loadSections(physProxy, loadAddrMask);
+ console->loadSections(physProxy, loadAddrMask);
// load symbols
if (!console->loadGlobalSymbols(consoleSymtab))
@@ -101,8 +119,8 @@ AlphaSystem::AlphaSystem(Params *p)
* others do.)
*/
if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
- virtPort->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
- strlen(params()->boot_osflags.c_str()));
+ virtProxy->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
+ strlen(params()->boot_osflags.c_str()));
}
/**
@@ -112,23 +130,13 @@ AlphaSystem::AlphaSystem(Params *p)
if (consoleSymtab->findAddress("m5_rpb", addr)) {
uint64_t data;
data = htog(params()->system_type);
- virtPort->write(addr+0x50, data);
+ virtProxy->write(addr+0x50, data);
data = htog(params()->system_rev);
- virtPort->write(addr+0x58, data);
+ virtProxy->write(addr+0x58, data);
} else
panic("could not find hwrpb\n");
}
-AlphaSystem::~AlphaSystem()
-{
- delete consoleSymtab;
- delete console;
- delete pal;
-#ifdef DEBUG
- delete consolePanicEvent;
-#endif
-}
-
/**
* This function fixes up addresses that are used to match PCs for
* hooking simulator events on to target function executions.
@@ -170,8 +178,8 @@ AlphaSystem::fixFuncEventAddr(Addr addr)
// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
- uint32_t i1 = virtPort->read<uint32_t>(addr);
- uint32_t i2 = virtPort->read<uint32_t>(addr + sizeof(MachInst));
+ uint32_t i1 = virtProxy->read<uint32_t>(addr);
+ uint32_t i2 = virtProxy->read<uint32_t>(addr + sizeof(MachInst));
if ((i1 & inst_mask) == gp_ldah_pattern &&
(i2 & inst_mask) == gp_lda_pattern) {
@@ -188,7 +196,7 @@ AlphaSystem::setAlphaAccess(Addr access)
{
Addr addr = 0;
if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
- virtPort->write(addr, htog(Phys2K0Seg(access)));
+ virtProxy->write(addr, htog(Phys2K0Seg(access)));
} else {
panic("could not find m5AlphaAccess\n");
}
diff --git a/src/arch/alpha/system.hh b/src/arch/alpha/system.hh
index a74aa206f..0e809cb94 100644
--- a/src/arch/alpha/system.hh
+++ b/src/arch/alpha/system.hh
@@ -50,6 +50,12 @@ class AlphaSystem : public System
~AlphaSystem();
public:
+
+ /**
+ * Initialise the state of the system.
+ */
+ virtual void initState();
+
/**
* Serialization stuff
*/
diff --git a/src/arch/alpha/tru64/process.cc b/src/arch/alpha/tru64/process.cc
index 96fe2725f..071428d5e 100644
--- a/src/arch/alpha/tru64/process.cc
+++ b/src/arch/alpha/tru64/process.cc
@@ -55,7 +55,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "732");
strcpy(name->machine, "alpha");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -74,21 +74,21 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
case AlphaTru64::GSI_MAX_CPU: {
TypedBufferArg<uint32_t> max_cpu(bufPtr);
*max_cpu = htog((uint32_t)process->numCpus());
- max_cpu.copyOut(tc->getMemPort());
+ max_cpu.copyOut(tc->getMemProxy());
return 1;
}
case AlphaTru64::GSI_CPUS_IN_BOX: {
TypedBufferArg<uint32_t> cpus_in_box(bufPtr);
*cpus_in_box = htog((uint32_t)process->numCpus());
- cpus_in_box.copyOut(tc->getMemPort());
+ cpus_in_box.copyOut(tc->getMemProxy());
return 1;
}
case AlphaTru64::GSI_PHYSMEM: {
TypedBufferArg<uint64_t> physmem(bufPtr);
*physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
- physmem.copyOut(tc->getMemPort());
+ physmem.copyOut(tc->getMemProxy());
return 1;
}
@@ -105,14 +105,14 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
infop->cpu_ex_binding = htog(0);
infop->mhz = htog(667);
- infop.copyOut(tc->getMemPort());
+ infop.copyOut(tc->getMemProxy());
return 1;
}
case AlphaTru64::GSI_PROC_TYPE: {
TypedBufferArg<uint64_t> proc_type(bufPtr);
*proc_type = htog((uint64_t)11);
- proc_type.copyOut(tc->getMemPort());
+ proc_type.copyOut(tc->getMemProxy());
return 1;
}
@@ -121,14 +121,14 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strncpy((char *)bufArg.bufferPtr(),
"COMPAQ Professional Workstation XP1000",
nbytes);
- bufArg.copyOut(tc->getMemPort());
+ bufArg.copyOut(tc->getMemProxy());
return 1;
}
case AlphaTru64::GSI_CLK_TCK: {
TypedBufferArg<uint64_t> clk_hz(bufPtr);
*clk_hz = htog((uint64_t)1024);
- clk_hz.copyOut(tc->getMemPort());
+ clk_hz.copyOut(tc->getMemProxy());
return 1;
}
@@ -193,7 +193,7 @@ tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
elp->si_phz = htog(clk_hz);
elp->si_boottime = htog(seconds_since_epoch); // seconds since epoch?
elp->si_max_procs = htog(process->numCpus());
- elp.copyOut(tc->getMemPort());
+ elp.copyOut(tc->getMemProxy());
return 0;
}
diff --git a/src/arch/alpha/tru64/system.cc b/src/arch/alpha/tru64/system.cc
index 5a47addbd..13cc93247 100644
--- a/src/arch/alpha/tru64/system.cc
+++ b/src/arch/alpha/tru64/system.cc
@@ -38,9 +38,7 @@
#include "cpu/thread_context.hh"
#include "kern/tru64/tru64_events.hh"
#include "kern/system_events.hh"
-#include "mem/physical.hh"
-#include "mem/port.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
using namespace std;
@@ -49,7 +47,7 @@ Tru64AlphaSystem::Tru64AlphaSystem(Tru64AlphaSystem::Params *p)
{
Addr addr = 0;
if (kernelSymtab->findAddress("enable_async_printf", addr)) {
- virtPort->write(addr, (uint32_t)0);
+ virtProxy->write(addr, (uint32_t)0);
}
#ifdef DEBUG
diff --git a/src/arch/alpha/utility.cc b/src/arch/alpha/utility.cc
index 0048e43e9..efafec4bc 100644
--- a/src/arch/alpha/utility.cc
+++ b/src/arch/alpha/utility.cc
@@ -31,7 +31,7 @@
#include "arch/alpha/utility.hh"
#include "arch/alpha/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/full_system.hh"
namespace AlphaISA {
@@ -48,7 +48,7 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
return tc->readIntReg(16 + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- VirtualPort *vp = tc->getVirtPort();
+ FSTranslatingPortProxy* vp = tc->getVirtProxy();
uint64_t arg = vp->read<uint64_t>(sp +
(number-NumArgumentRegs) * sizeof(uint64_t));
return arg;
diff --git a/src/arch/alpha/vtophys.cc b/src/arch/alpha/vtophys.cc
index c51cddd11..453c48444 100644
--- a/src/arch/alpha/vtophys.cc
+++ b/src/arch/alpha/vtophys.cc
@@ -38,14 +38,14 @@
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "debug/VtoPhys.hh"
-#include "mem/vport.hh"
+#include "mem/port_proxy.hh"
using namespace std;
namespace AlphaISA {
PageTableEntry
-kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, VAddr vaddr)
+kernel_pte_lookup(PortProxy* mem, Addr ptbr, VAddr vaddr)
{
Addr level1_pte = ptbr + vaddr.level1();
PageTableEntry level1 = mem->read<uint64_t>(level1_pte);
@@ -103,7 +103,7 @@ vtophys(ThreadContext *tc, Addr addr)
paddr = vaddr;
} else {
PageTableEntry pte =
- kernel_pte_lookup(tc->getPhysPort(), ptbr, vaddr);
+ kernel_pte_lookup(tc->getPhysProxy(), ptbr, vaddr);
if (pte.valid())
paddr = pte.paddr() | vaddr.offset();
}
diff --git a/src/arch/alpha/vtophys.hh b/src/arch/alpha/vtophys.hh
index b13afd090..1695676cb 100644
--- a/src/arch/alpha/vtophys.hh
+++ b/src/arch/alpha/vtophys.hh
@@ -37,11 +37,11 @@
#include "arch/alpha/utility.hh"
class ThreadContext;
-class FunctionalPort;
+class PortProxy;
namespace AlphaISA {
-PageTableEntry kernel_pte_lookup(FunctionalPort *mem, Addr ptbr,
+PageTableEntry kernel_pte_lookup(PortProxy* mem, Addr ptbr,
VAddr vaddr);
Addr vtophys(Addr vaddr);
diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc
index c65962d00..1074b0362 100644
--- a/src/arch/arm/linux/process.cc
+++ b/src/arch/arm/linux/process.cc
@@ -70,7 +70,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "armv7l");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -452,7 +452,7 @@ setTLSFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
int index = 0;
uint32_t tlsPtr = process->getSyscallArg(tc, index);
- tc->getMemPort()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
+ tc->getMemProxy()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
(uint8_t *)&tlsPtr, sizeof(tlsPtr));
tc->setMiscReg(MISCREG_TPIDRURO,tlsPtr);
return 0;
@@ -512,7 +512,7 @@ ArmLinuxProcess::initState()
// Fill this page with swi -1 so we'll no if we land in it somewhere.
for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) {
- tc->getMemPort()->writeBlob(commPage + addr,
+ tc->getMemProxy()->writeBlob(commPage + addr,
swiNeg1, sizeof(swiNeg1));
}
@@ -521,7 +521,7 @@ ArmLinuxProcess::initState()
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fa0, memory_barrier,
+ tc->getMemProxy()->writeBlob(commPage + 0x0fa0, memory_barrier,
sizeof(memory_barrier));
uint8_t cmpxchg[] =
@@ -535,7 +535,7 @@ ArmLinuxProcess::initState()
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
+ tc->getMemProxy()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
uint8_t get_tls[] =
{
@@ -543,7 +543,7 @@ ArmLinuxProcess::initState()
0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
+ tc->getMemProxy()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
}
ArmISA::IntReg
diff --git a/src/arch/arm/linux/system.cc b/src/arch/arm/linux/system.cc
index 66f4f26af..a764edaca 100644
--- a/src/arch/arm/linux/system.cc
+++ b/src/arch/arm/linux/system.cc
@@ -49,6 +49,7 @@
#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
#include "kern/linux/events.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "mem/physical.hh"
using namespace ArmISA;
@@ -57,6 +58,27 @@ using namespace Linux;
LinuxArmSystem::LinuxArmSystem(Params *p)
: ArmSystem(p)
{
+}
+
+bool
+LinuxArmSystem::adderBootUncacheable(Addr a)
+{
+ Addr block = a & ~ULL(0x7F);
+ if (block == secDataPtrAddr || block == secDataAddr ||
+ block == penReleaseAddr)
+ return true;
+ return false;
+}
+
+void
+LinuxArmSystem::initState()
+{
+ // Moved from the constructor to here since it relies on the
+ // address map being resolved in the interconnect
+
+ // Call the initialisation of the super class
+ ArmSystem::initState();
+
// Load symbols at physical address, we might not want
// to do this perminately, for but early bootup work
// it is helpfulp.
@@ -92,7 +114,7 @@ LinuxArmSystem::LinuxArmSystem(Params *p)
DPRINTF(Loader, "Boot atags was %d bytes in total\n", size << 2);
DDUMP(Loader, boot_data, size << 2);
- functionalPort->writeBlob(ParamsList, boot_data, size << 2);
+ physProxy->writeBlob(ParamsList, boot_data, size << 2);
#ifndef NDEBUG
kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic");
@@ -128,22 +150,6 @@ LinuxArmSystem::LinuxArmSystem(Params *p)
secDataPtrAddr &= ~ULL(0x7F);
secDataAddr &= ~ULL(0x7F);
penReleaseAddr &= ~ULL(0x7F);
-}
-
-bool
-LinuxArmSystem::adderBootUncacheable(Addr a)
-{
- Addr block = a & ~ULL(0x7F);
- if (block == secDataPtrAddr || block == secDataAddr ||
- block == penReleaseAddr)
- return true;
- return false;
-}
-
-void
-LinuxArmSystem::initState()
-{
- ArmSystem::initState();
for (int i = 0; i < threadContexts.size(); i++) {
threadContexts[i]->setIntReg(0, 0);
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index aa5d7dfce..c149f5409 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -50,7 +50,6 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
-#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
#include "sim/system.hh"
diff --git a/src/arch/arm/stacktrace.cc b/src/arch/arm/stacktrace.cc
index 31376cdae..69d0f354c 100644
--- a/src/arch/arm/stacktrace.cc
+++ b/src/arch/arm/stacktrace.cc
@@ -37,7 +37,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace std;
@@ -48,9 +48,9 @@ namespace ArmISA
{
Addr addr = 0;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 4d4dff4d9..ca5bfc471 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -47,6 +47,7 @@
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh"
#include "mem/physical.hh"
+#include "mem/fs_translating_port_proxy.hh"
using namespace std;
using namespace Linux;
@@ -55,6 +56,18 @@ ArmSystem::ArmSystem(Params *p)
: System(p), bootldr(NULL)
{
debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
+}
+
+void
+ArmSystem::initState()
+{
+ // Moved from the constructor to here since it relies on the
+ // address map being resolved in the interconnect
+
+ // Call the initialisation of the super class
+ System::initState();
+
+ const Params* p = params();
if ((p->boot_loader == "") != (p->boot_loader_mem == NULL))
fatal("If boot_loader is specifed, memory to load it must be also.\n");
@@ -65,29 +78,18 @@ ArmSystem::ArmSystem(Params *p)
if (!bootldr)
fatal("Could not read bootloader: %s\n", p->boot_loader);
- Port *mem_port;
- FunctionalPort fp(name() + "-fport");
- mem_port = p->boot_loader_mem->getPort("functional");
- fp.setPeer(mem_port);
- mem_port->setPeer(&fp);
-
- bootldr->loadSections(&fp);
+ bootldr->loadSections(physProxy);
bootldr->loadGlobalSymbols(debugSymbolTable);
uint8_t jump_to_bl[] =
{
0x07, 0xf0, 0xa0, 0xe1 // branch to r7
};
- functionalPort->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl));
+ physProxy->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl));
inform("Using bootloader at address %#x\n", bootldr->entryPoint());
}
-}
-void
-ArmSystem::initState()
-{
- System::initState();
if (bootldr) {
// Put the address of the boot loader into r7 so we know
// where to branch to after the reset fault
@@ -98,16 +100,16 @@ ArmSystem::initState()
threadContexts[i]->setIntReg(5, params()->flags_addr);
threadContexts[i]->setIntReg(7, bootldr->entryPoint());
}
- if (!params()->gic_cpu_addr || !params()->flags_addr)
+ if (!p->gic_cpu_addr || !p->flags_addr)
fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
} else {
// Set the initial PC to be at start of the kernel code
threadContexts[0]->pcState(kernelEntry & loadAddrMask);
}
for (int i = 0; i < threadContexts.size(); i++) {
- if (params()->midr_regval) {
+ if (p->midr_regval) {
threadContexts[i]->setMiscReg(ArmISA::MISCREG_MIDR,
- params()->midr_regval);
+ p->midr_regval);
}
}
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index 32b48a85b..7cf36fd6c 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -76,7 +76,10 @@ class ArmSystem : public System
ArmSystem(Params *p);
~ArmSystem();
- void initState();
+ /**
+ * Initialise the system
+ */
+ virtual void initState();
/** Check if an address should be uncacheable until all caches are enabled.
* This exits because coherence on some addresses at boot is maintained via
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 6c2997a27..42b5be181 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -44,7 +44,7 @@
#include "arch/arm/utility.hh"
#include "arch/arm/vtophys.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/full_system.hh"
namespace ArmISA {
@@ -86,7 +86,7 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
}
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- VirtualPort *vp = tc->getVirtPort();
+ FSTranslatingPortProxy* vp = tc->getVirtProxy();
uint64_t arg;
if (size == sizeof(uint64_t)) {
// If the argument is even it must be aligned
diff --git a/src/arch/arm/vtophys.cc b/src/arch/arm/vtophys.cc
index 1691a387c..45e6f1849 100644
--- a/src/arch/arm/vtophys.cc
+++ b/src/arch/arm/vtophys.cc
@@ -51,7 +51,7 @@
#include "base/chunk_generator.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
using namespace std;
using namespace ArmISA;
@@ -101,7 +101,7 @@ ArmISA::vtophys(ThreadContext *tc, Addr addr)
N = 0;
}
- FunctionalPort *port = tc->getPhysPort();
+ PortProxy* port = tc->getPhysProxy();
Addr l1desc_addr = mbits(ttbr, 31, 14-N) | (bits(addr,31-N,20) << 2);
TableWalker::L1Descriptor l1desc;
diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc
index 0982e05cb..fda32b97b 100644
--- a/src/arch/mips/linux/process.cc
+++ b/src/arch/mips/linux/process.cc
@@ -59,7 +59,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "mips");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -82,7 +82,7 @@ sys_getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
TypedBufferArg<uint64_t> fpcr(bufPtr);
// I don't think this exactly matches the HW FPCR
*fpcr = 0;
- fpcr.copyOut(tc->getMemPort());
+ fpcr.copyOut(tc->getMemProxy());
return 0;
}
default:
@@ -111,7 +111,7 @@ sys_setsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
// SSI_IEEE_FP_CONTROL
TypedBufferArg<uint64_t> fpcr(bufPtr);
// I don't think this exactly matches the HW FPCR
- fpcr.copyIn(tc->getMemPort());
+ fpcr.copyIn(tc->getMemProxy());
DPRINTFR(SyscallVerbose, "sys_setsysinfo(SSI_IEEE_FP_CONTROL): "
" setting FPCR to 0x%x\n", gtoh(*(uint64_t*)fpcr));
return 0;
diff --git a/src/arch/mips/linux/system.cc b/src/arch/mips/linux/system.cc
index 30e0f95e9..f97426f85 100644
--- a/src/arch/mips/linux/system.cc
+++ b/src/arch/mips/linux/system.cc
@@ -63,91 +63,10 @@ using namespace Linux;
LinuxMipsSystem::LinuxMipsSystem(Params *p)
: MipsSystem(p)
{
- Addr addr = 0;
-
- /**
- * The symbol swapper_pg_dir marks the beginning of the kernel and
- * the location of bootloader passed arguments
- */
- if (!kernelSymtab->findAddress("swapper_pg_dir", KernelStart)) {
- panic("Could not determine start location of kernel");
- }
-
- /**
- * Since we aren't using a bootloader, we have to copy the
- * kernel arguments directly into the kernel's memory.
- */
- virtPort->writeBlob(CommandLine(), (uint8_t*)params()->boot_osflags.c_str(),
- params()->boot_osflags.length()+1);
-
- /**
- * find the address of the est_cycle_freq variable and insert it
- * so we don't through the lengthly process of trying to
- * calculated it by using the PIT, RTC, etc.
- */
- if (kernelSymtab->findAddress("est_cycle_freq", addr))
- virtPort->write(addr, (uint64_t)(SimClock::Frequency /
- p->boot_cpu_frequency));
-
- /**
- * EV5 only supports 127 ASNs so we are going to tell the kernel that the
- * paritiuclar EV6 we have only supports 127 asns.
- * @todo At some point we should change ev5.hh and the palcode to support
- * 255 ASNs.
- */
- if (kernelSymtab->findAddress("dp264_mv", addr))
- virtPort->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
- else
- panic("could not find dp264_mv\n");
-
-#ifndef NDEBUG
- kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic");
- if (!kernelPanicEvent)
- panic("could not find kernel symbol \'panic\'");
-
-#endif
-
- /**
- * Any time ide_delay_50ms, calibarte_delay or
- * determine_cpu_caches is called just skip the
- * function. Currently determine_cpu_caches only is used put
- * information in proc, however if that changes in the future we
- * will have to fill in the cache size variables appropriately.
- */
-
- skipIdeDelay50msEvent =
- addKernelFuncEvent<SkipFuncEvent>("ide_delay_50ms");
- skipDelayLoopEvent =
- addKernelFuncEvent<SkipDelayLoopEvent>("calibrate_delay");
- skipCacheProbeEvent =
- addKernelFuncEvent<SkipFuncEvent>("determine_cpu_caches");
- debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
- idleStartEvent = addKernelFuncEvent<IdleStartEvent>("cpu_idle");
-
- // Disable for now as it runs into panic() calls in VPTr methods
- // (see sim/vptr.hh). Once those bugs are fixed, we can
- // re-enable, but we should find a better way to turn it on than
- // using DTRACE(Thread), since looking at a trace flag at tick 0
- // leads to non-intuitive behavior with --trace-start.
- if (false && kernelSymtab->findAddress("mips_switch_to", addr)) {
- printThreadEvent = new PrintThreadInfo(&pcEventQueue, "threadinfo",
- addr + sizeof(MachInst) * 6);
- } else {
- printThreadEvent = NULL;
- }
}
LinuxMipsSystem::~LinuxMipsSystem()
{
-#ifndef NDEBUG
- delete kernelPanicEvent;
-#endif
- delete skipIdeDelay50msEvent;
- delete skipDelayLoopEvent;
- delete skipCacheProbeEvent;
- delete debugPrintkEvent;
- delete idleStartEvent;
- delete printThreadEvent;
}
diff --git a/src/arch/mips/linux/threadinfo.hh b/src/arch/mips/linux/threadinfo.hh
index 20a4033dd..40dd435d6 100644
--- a/src/arch/mips/linux/threadinfo.hh
+++ b/src/arch/mips/linux/threadinfo.hh
@@ -79,7 +79,7 @@ class ThreadInfo
if (!addr)
addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/);
- FunctionalPort *p = tc->getPhysPort();
+ PortProxy* p = tc->getPhysProxy();
p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
return sp & ~ULL(0x3fff);
diff --git a/src/arch/mips/stacktrace.cc b/src/arch/mips/stacktrace.cc
index 50f6e1fb0..d4548b4bb 100644
--- a/src/arch/mips/stacktrace.cc
+++ b/src/arch/mips/stacktrace.cc
@@ -37,7 +37,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace std;
@@ -55,9 +55,9 @@ ProcessInfo::task(Addr ksp) const
Addr tsk;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
tsk = vp->readGtoH<Addr>(base + task_off);
return tsk;
@@ -72,9 +72,9 @@ ProcessInfo::pid(Addr ksp) const
uint16_t pd;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
pd = vp->readGtoH<uint16_t>(task + pid_off);
return pd;
diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc
index d367acd64..f0d4c250e 100755
--- a/src/arch/mips/system.cc
+++ b/src/arch/mips/system.cc
@@ -38,7 +38,6 @@
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "mem/physical.hh"
-#include "mem/vport.hh"
#include "params/MipsSystem.hh"
#include "sim/byteswap.hh"
@@ -46,67 +45,6 @@ using namespace LittleEndianGuest;
MipsSystem::MipsSystem(Params *p) : System(p)
{
- if (p->bare_iron == true) {
- hexFile = new HexFile(params()->hex_file_name);
- if (!hexFile->loadSections(functionalPort))
- panic("Could not load hex file\n");
- }
-
- Addr addr = 0;
-
- consoleSymtab = new SymbolTable;
-
-
- /**
- * Load the console code into memory
- */
- // Load Console Code
- console = createObjectFile(params()->console);
-
- warn("console code is located at: %s\n", params()->console);
-
- if (console == NULL)
- fatal("Could not load console file %s", params()->console);
- //Load program sections into memory
- console->loadSections(functionalPort, loadAddrMask);
-
- //load symbols
- if (!console->loadGlobalSymbols(consoleSymtab))
- panic("could not load console symbols\n");
-
- if (!console->loadGlobalSymbols(debugSymbolTable))
- panic("could not load console symbols\n");
-
-
-#ifndef NDEBUG
- consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
-#endif
-
- /**
- * Copy the osflags (kernel arguments) into the consoles
- * memory. (Presently Linux does not use the console service
- * routine to get these command line arguments, but Tru64 and
- * others do.)
- */
- if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
- warn("writing addr starting from %#x", addr);
- virtPort->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
- strlen(params()->boot_osflags.c_str()));
- }
-
- /**
- * Set the hardware reset parameter block system type and revision
- * information to Tsunami.
- */
- if (consoleSymtab->findAddress("m5_rpb", addr)) {
- uint64_t data;
- data = htog(params()->system_type);
- virtPort->write(addr + 0x50, data);
- data = htog(params()->system_rev);
- virtPort->write(addr + 0x58, data);
- } else {
- panic("could not find hwrpb\n");
- }
}
MipsSystem::~MipsSystem()
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index 1f3b19c7b..65432b4ea 100644
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -31,17 +31,16 @@
#include <cmath>
#include "arch/mips/isa_traits.hh"
+#include "arch/mips/registers.hh"
#include "arch/mips/utility.hh"
+#include "arch/mips/vtophys.hh"
#include "base/bitfield.hh"
#include "base/misc.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/serialize.hh"
-#include "arch/mips/registers.hh"
-#include "arch/mips/vtophys.hh"
-#include "mem/vport.hh"
-
using namespace MipsISA;
using namespace std;
diff --git a/src/arch/mips/vtophys.cc b/src/arch/mips/vtophys.cc
index c6a317df8..60d9bc1ba 100755
--- a/src/arch/mips/vtophys.cc
+++ b/src/arch/mips/vtophys.cc
@@ -38,7 +38,6 @@
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "debug/VtoPhys.hh"
-#include "mem/vport.hh"
using namespace std;
using namespace MipsISA;
diff --git a/src/arch/power/linux/process.cc b/src/arch/power/linux/process.cc
index 1c1b2827f..f83df41d1 100644
--- a/src/arch/power/linux/process.cc
+++ b/src/arch/power/linux/process.cc
@@ -59,7 +59,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "power");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index 788c7cc0c..4a5c06673 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -39,7 +39,6 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
-#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
#include "sim/system.hh"
diff --git a/src/arch/sparc/linux/syscalls.cc b/src/arch/sparc/linux/syscalls.cc
index 034c38bef..9433cb508 100644
--- a/src/arch/sparc/linux/syscalls.cc
+++ b/src/arch/sparc/linux/syscalls.cc
@@ -50,7 +50,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "sparc");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -69,19 +69,19 @@ getresuidFunc(SyscallDesc *desc, int num, LiveProcess *p, ThreadContext *tc)
if (ruid) {
BufferArg ruidBuff(ruid, sizeof(IntReg));
memcpy(ruidBuff.bufferPtr(), &id, sizeof(IntReg));
- ruidBuff.copyOut(tc->getMemPort());
+ ruidBuff.copyOut(tc->getMemProxy());
}
// Set the euid
if (euid) {
BufferArg euidBuff(euid, sizeof(IntReg));
memcpy(euidBuff.bufferPtr(), &id, sizeof(IntReg));
- euidBuff.copyOut(tc->getMemPort());
+ euidBuff.copyOut(tc->getMemProxy());
}
// Set the suid
if (suid) {
BufferArg suidBuff(suid, sizeof(IntReg));
memcpy(suidBuff.bufferPtr(), &id, sizeof(IntReg));
- suidBuff.copyOut(tc->getMemPort());
+ suidBuff.copyOut(tc->getMemProxy());
}
return 0;
}
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 5c594dcbc..cc39ecf31 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -41,7 +41,6 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
-#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
#include "sim/system.hh"
@@ -448,7 +447,7 @@ void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
for (int index = 16; index < 32; index++) {
uint32_t regVal = tc->readIntReg(index);
regVal = htog(regVal);
- if (!tc->getMemPort()->tryWriteBlob(
+ if (!tc->getMemProxy()->tryWriteBlob(
sp + (index - 16) * 4, (uint8_t *)&regVal, 4)) {
warn("Failed to save register to the stack when "
"flushing windows.\n");
@@ -483,7 +482,7 @@ Sparc64LiveProcess::flushWindows(ThreadContext *tc)
for (int index = 16; index < 32; index++) {
IntReg regVal = tc->readIntReg(index);
regVal = htog(regVal);
- if (!tc->getMemPort()->tryWriteBlob(
+ if (!tc->getMemProxy()->tryWriteBlob(
sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
warn("Failed to save register to the stack when "
"flushing windows.\n");
diff --git a/src/arch/sparc/solaris/process.cc b/src/arch/sparc/solaris/process.cc
index e47377d42..f929877f3 100644
--- a/src/arch/sparc/solaris/process.cc
+++ b/src/arch/sparc/solaris/process.cc
@@ -55,7 +55,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "Generic_118558-21");
strcpy(name->machine, "sun4u");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 9988702d2..ab5f7432e 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -40,10 +40,7 @@
using namespace BigEndianGuest;
SparcSystem::SparcSystem(Params *p)
- : System(p), sysTick(0),funcRomPort(p->name + "-fromport"),
- funcNvramPort(p->name + "-fnvramport"),
- funcHypDescPort(p->name + "-fhypdescport"),
- funcPartDescPort(p->name + "-fpartdescport")
+ : System(p), sysTick(0)
{
resetSymtab = new SymbolTable;
hypervisorSymtab = new SymbolTable;
@@ -51,23 +48,13 @@ SparcSystem::SparcSystem(Params *p)
nvramSymtab = new SymbolTable;
hypervisorDescSymtab = new SymbolTable;
partitionDescSymtab = new SymbolTable;
+}
- Port *rom_port;
- rom_port = params()->rom->getPort("functional");
- funcRomPort.setPeer(rom_port);
- rom_port->setPeer(&funcRomPort);
-
- rom_port = params()->nvram->getPort("functional");
- funcNvramPort.setPeer(rom_port);
- rom_port->setPeer(&funcNvramPort);
-
- rom_port = params()->hypervisor_desc->getPort("functional");
- funcHypDescPort.setPeer(rom_port);
- rom_port->setPeer(&funcHypDescPort);
-
- rom_port = params()->partition_desc->getPort("functional");
- funcPartDescPort.setPeer(rom_port);
- rom_port->setPeer(&funcPartDescPort);
+void
+SparcSystem::initState()
+{
+ // Call the initialisation of the super class
+ System::initState();
/**
* Load the boot code, and hypervisor into memory.
@@ -107,22 +94,22 @@ SparcSystem::SparcSystem(Params *p)
// Load reset binary into memory
reset->setTextBase(params()->reset_addr);
- reset->loadSections(&funcRomPort);
+ reset->loadSections(physProxy);
// Load the openboot binary
openboot->setTextBase(params()->openboot_addr);
- openboot->loadSections(&funcRomPort);
+ openboot->loadSections(physProxy);
// Load the hypervisor binary
hypervisor->setTextBase(params()->hypervisor_addr);
- hypervisor->loadSections(&funcRomPort);
+ hypervisor->loadSections(physProxy);
// Load the nvram image
nvram->setTextBase(params()->nvram_addr);
- nvram->loadSections(&funcNvramPort);
+ nvram->loadSections(physProxy);
// Load the hypervisor description image
hypervisor_desc->setTextBase(params()->hypervisor_desc_addr);
- hypervisor_desc->loadSections(&funcHypDescPort);
+ hypervisor_desc->loadSections(physProxy);
// Load the partition description image
partition_desc->setTextBase(params()->partition_desc_addr);
- partition_desc->loadSections(&funcPartDescPort);
+ partition_desc->loadSections(physProxy);
// load symbols
if (!reset->loadGlobalSymbols(resetSymtab))
diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh
index 292f56b60..4b3da6287 100644
--- a/src/arch/sparc/system.hh
+++ b/src/arch/sparc/system.hh
@@ -48,6 +48,8 @@ class SparcSystem : public System
SparcSystem(Params *p);
~SparcSystem();
+ virtual void initState();
+
/**
* Serialization stuff
*/
@@ -94,18 +96,6 @@ class SparcSystem : public System
/** System Tick for syncronized tick across all cpus. */
Tick sysTick;
- /** functional port to ROM */
- FunctionalPort funcRomPort;
-
- /** functional port to nvram */
- FunctionalPort funcNvramPort;
-
- /** functional port to hypervisor description */
- FunctionalPort funcHypDescPort;
-
- /** functional port to partition description */
- FunctionalPort funcPartDescPort;
-
protected:
const Params *params() const { return (const Params *)_params; }
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 63b8e7960..74b1b2794 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -32,7 +32,7 @@
#include "arch/sparc/faults.hh"
#include "arch/sparc/utility.hh"
#include "arch/sparc/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
namespace SparcISA {
@@ -52,7 +52,7 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
return tc->readIntReg(8 + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
- VirtualPort *vp = tc->getVirtPort();
+ FSTranslatingPortProxy* vp = tc->getVirtProxy();
uint64_t arg = vp->read<uint64_t>(sp + 92 +
(number-NumArgumentRegs) * sizeof(uint64_t));
return arg;
diff --git a/src/arch/sparc/vtophys.cc b/src/arch/sparc/vtophys.cc
index edcf88828..7e3c5fe01 100644
--- a/src/arch/sparc/vtophys.cc
+++ b/src/arch/sparc/vtophys.cc
@@ -37,7 +37,7 @@
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "debug/VtoPhys.hh"
-#include "mem/vport.hh"
+#include "mem/port_proxy.hh"
using namespace std;
@@ -81,7 +81,7 @@ vtophys(ThreadContext *tc, Addr addr)
int pri_context = bits(tlbdata,47,32);
// int sec_context = bits(tlbdata,63,48);
- FunctionalPort *mem = tc->getPhysPort();
+ PortProxy* mem = tc->getPhysProxy();
TLB* itb = tc->getITBPtr();
TLB* dtb = tc->getDTBPtr();
TlbEntry* tbe;
diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc
index af32709aa..974af28a5 100644
--- a/src/arch/x86/bios/intelmp.cc
+++ b/src/arch/x86/bios/intelmp.cc
@@ -41,7 +41,7 @@
#include "arch/x86/isa_traits.hh"
#include "base/misc.hh"
#include "base/types.hh"
-#include "mem/port.hh"
+#include "mem/port_proxy.hh"
#include "sim/byteswap.hh"
// Config entry types
@@ -70,10 +70,10 @@ const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_";
template<class T>
uint8_t
-writeOutField(FunctionalPort * port, Addr addr, T val)
+writeOutField(PortProxy* proxy, Addr addr, T val)
{
T guestVal = X86ISA::htog(val);
- port->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
+ proxy->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
uint8_t checkSum = 0;
while(guestVal) {
@@ -84,7 +84,7 @@ writeOutField(FunctionalPort * port, Addr addr, T val)
}
uint8_t
-writeOutString(FunctionalPort * port, Addr addr, string str, int length)
+writeOutString(PortProxy* proxy, Addr addr, string str, int length)
{
char cleanedString[length + 1];
cleanedString[length] = 0;
@@ -97,7 +97,7 @@ writeOutString(FunctionalPort * port, Addr addr, string str, int length)
memcpy(cleanedString, str.c_str(), str.length());
memset(cleanedString + str.length(), 0, length - str.length());
}
- port->writeBlob(addr, (uint8_t *)(&cleanedString), length);
+ proxy->writeBlob(addr, (uint8_t *)(&cleanedString), length);
uint8_t checkSum = 0;
for (int i = 0; i < length; i++)
@@ -107,7 +107,7 @@ writeOutString(FunctionalPort * port, Addr addr, string str, int length)
}
Addr
-X86ISA::IntelMP::FloatingPointer::writeOut(FunctionalPort * port, Addr addr)
+X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr)
{
// Make sure that either a config table is present or a default
// configuration was found but not both.
@@ -120,28 +120,28 @@ X86ISA::IntelMP::FloatingPointer::writeOut(FunctionalPort * port, Addr addr)
uint8_t checkSum = 0;
- port->writeBlob(addr, (uint8_t *)signature, 4);
+ proxy->writeBlob(addr, (uint8_t *)signature, 4);
for (int i = 0; i < 4; i++)
checkSum += signature[i];
- checkSum += writeOutField(port, addr + 4, tableAddr);
+ checkSum += writeOutField(proxy, addr + 4, tableAddr);
// The length of the structure in paragraphs, aka 16 byte chunks.
uint8_t length = 1;
- port->writeBlob(addr + 8, &length, 1);
+ proxy->writeBlob(addr + 8, &length, 1);
checkSum += length;
- port->writeBlob(addr + 9, &specRev, 1);
+ proxy->writeBlob(addr + 9, &specRev, 1);
checkSum += specRev;
- port->writeBlob(addr + 11, &defaultConfig, 1);
+ proxy->writeBlob(addr + 11, &defaultConfig, 1);
checkSum += defaultConfig;
uint32_t features2_5 = imcrPresent ? (1 << 7) : 0;
- checkSum += writeOutField(port, addr + 12, features2_5);
+ checkSum += writeOutField(proxy, addr + 12, features2_5);
checkSum = -checkSum;
- port->writeBlob(addr + 10, &checkSum, 1);
+ proxy->writeBlob(addr + 10, &checkSum, 1);
return 16;
}
@@ -158,10 +158,10 @@ X86IntelMPFloatingPointerParams::create()
}
Addr
-X86ISA::IntelMP::BaseConfigEntry::writeOut(FunctionalPort * port,
+X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy* proxy,
Addr addr, uint8_t &checkSum)
{
- port->writeBlob(addr, &type, 1);
+ proxy->writeBlob(addr, &type, 1);
checkSum += type;
return 1;
}
@@ -171,12 +171,12 @@ X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) :
{}
Addr
-X86ISA::IntelMP::ExtConfigEntry::writeOut(FunctionalPort * port,
+X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy* proxy,
Addr addr, uint8_t &checkSum)
{
- port->writeBlob(addr, &type, 1);
+ proxy->writeBlob(addr, &type, 1);
checkSum += type;
- port->writeBlob(addr + 1, &length, 1);
+ proxy->writeBlob(addr + 1, &length, 1);
checkSum += length;
return 1;
}
@@ -189,59 +189,59 @@ X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p,
const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP";
Addr
-X86ISA::IntelMP::ConfigTable::writeOut(FunctionalPort * port, Addr addr)
+X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr)
{
uint8_t checkSum = 0;
- port->writeBlob(addr, (uint8_t *)signature, 4);
+ proxy->writeBlob(addr, (uint8_t *)signature, 4);
for (int i = 0; i < 4; i++)
checkSum += signature[i];
// Base table length goes here but will be calculated later.
- port->writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
+ proxy->writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
checkSum += specRev;
// The checksum goes here but is still being calculated.
- checkSum += writeOutString(port, addr + 8, oemID, 8);
- checkSum += writeOutString(port, addr + 16, productID, 12);
+ checkSum += writeOutString(proxy, addr + 8, oemID, 8);
+ checkSum += writeOutString(proxy, addr + 16, productID, 12);
- checkSum += writeOutField(port, addr + 28, oemTableAddr);
- checkSum += writeOutField(port, addr + 32, oemTableSize);
- checkSum += writeOutField(port, addr + 34, (uint16_t)baseEntries.size());
- checkSum += writeOutField(port, addr + 36, localApic);
+ checkSum += writeOutField(proxy, addr + 28, oemTableAddr);
+ checkSum += writeOutField(proxy, addr + 32, oemTableSize);
+ checkSum += writeOutField(proxy, addr + 34, (uint16_t)baseEntries.size());
+ checkSum += writeOutField(proxy, addr + 36, localApic);
uint8_t reserved = 0;
- port->writeBlob(addr + 43, &reserved, 1);
+ proxy->writeBlob(addr + 43, &reserved, 1);
checkSum += reserved;
vector<BaseConfigEntry *>::iterator baseEnt;
uint16_t offset = 44;
for (baseEnt = baseEntries.begin();
baseEnt != baseEntries.end(); baseEnt++) {
- offset += (*baseEnt)->writeOut(port, addr + offset, checkSum);
+ offset += (*baseEnt)->writeOut(proxy, addr + offset, checkSum);
}
// We've found the end of the base table this point.
- checkSum += writeOutField(port, addr + 4, offset);
+ checkSum += writeOutField(proxy, addr + 4, offset);
vector<ExtConfigEntry *>::iterator extEnt;
uint16_t extOffset = 0;
uint8_t extCheckSum = 0;
for (extEnt = extEntries.begin();
extEnt != extEntries.end(); extEnt++) {
- extOffset += (*extEnt)->writeOut(port,
+ extOffset += (*extEnt)->writeOut(proxy,
addr + offset + extOffset, extCheckSum);
}
- checkSum += writeOutField(port, addr + 40, extOffset);
+ checkSum += writeOutField(proxy, addr + 40, extOffset);
extCheckSum = -extCheckSum;
- checkSum += writeOutField(port, addr + 42, extCheckSum);
+ checkSum += writeOutField(proxy, addr + 42, extCheckSum);
// And now, we finally have the whole check sum completed.
checkSum = -checkSum;
- writeOutField(port, addr + 7, checkSum);
+ writeOutField(proxy, addr + 7, checkSum);
return offset + extOffset;
};
@@ -261,18 +261,18 @@ X86IntelMPConfigTableParams::create()
Addr
X86ISA::IntelMP::Processor::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- BaseConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 1, localApicID);
- checkSum += writeOutField(port, addr + 2, localApicVersion);
- checkSum += writeOutField(port, addr + 3, cpuFlags);
- checkSum += writeOutField(port, addr + 4, cpuSignature);
- checkSum += writeOutField(port, addr + 8, featureFlags);
+ BaseConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 1, localApicID);
+ checkSum += writeOutField(proxy, addr + 2, localApicVersion);
+ checkSum += writeOutField(proxy, addr + 3, cpuFlags);
+ checkSum += writeOutField(proxy, addr + 4, cpuSignature);
+ checkSum += writeOutField(proxy, addr + 8, featureFlags);
uint32_t reserved = 0;
- port->writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
- port->writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
+ proxy->writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
+ proxy->writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
return 20;
}
@@ -298,11 +298,11 @@ X86IntelMPProcessorParams::create()
Addr
X86ISA::IntelMP::Bus::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- BaseConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 1, busID);
- checkSum += writeOutString(port, addr + 2, busType, 6);
+ BaseConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 1, busID);
+ checkSum += writeOutString(proxy, addr + 2, busType, 6);
return 8;
}
@@ -318,13 +318,13 @@ X86IntelMPBusParams::create()
Addr
X86ISA::IntelMP::IOAPIC::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- BaseConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 1, id);
- checkSum += writeOutField(port, addr + 2, version);
- checkSum += writeOutField(port, addr + 3, flags);
- checkSum += writeOutField(port, addr + 4, address);
+ BaseConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 1, id);
+ checkSum += writeOutField(proxy, addr + 2, version);
+ checkSum += writeOutField(proxy, addr + 3, flags);
+ checkSum += writeOutField(proxy, addr + 4, address);
return 8;
}
@@ -343,15 +343,15 @@ X86IntelMPIOAPICParams::create()
Addr
X86ISA::IntelMP::IntAssignment::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- BaseConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 1, interruptType);
- checkSum += writeOutField(port, addr + 2, flags);
- checkSum += writeOutField(port, addr + 4, sourceBusID);
- checkSum += writeOutField(port, addr + 5, sourceBusIRQ);
- checkSum += writeOutField(port, addr + 6, destApicID);
- checkSum += writeOutField(port, addr + 7, destApicIntIn);
+ BaseConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 1, interruptType);
+ checkSum += writeOutField(proxy, addr + 2, flags);
+ checkSum += writeOutField(proxy, addr + 4, sourceBusID);
+ checkSum += writeOutField(proxy, addr + 5, sourceBusIRQ);
+ checkSum += writeOutField(proxy, addr + 6, destApicID);
+ checkSum += writeOutField(proxy, addr + 7, destApicIntIn);
return 8;
}
@@ -381,13 +381,13 @@ X86IntelMPLocalIntAssignmentParams::create()
Addr
X86ISA::IntelMP::AddrSpaceMapping::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- ExtConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 2, busID);
- checkSum += writeOutField(port, addr + 3, addrType);
- checkSum += writeOutField(port, addr + 4, addr);
- checkSum += writeOutField(port, addr + 12, addrLength);
+ ExtConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 2, busID);
+ checkSum += writeOutField(proxy, addr + 3, addrType);
+ checkSum += writeOutField(proxy, addr + 4, addr);
+ checkSum += writeOutField(proxy, addr + 12, addrLength);
return length;
}
@@ -405,15 +405,15 @@ X86IntelMPAddrSpaceMappingParams::create()
Addr
X86ISA::IntelMP::BusHierarchy::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- ExtConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 2, busID);
- checkSum += writeOutField(port, addr + 3, info);
- checkSum += writeOutField(port, addr + 4, parentBus);
+ ExtConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 2, busID);
+ checkSum += writeOutField(proxy, addr + 3, info);
+ checkSum += writeOutField(proxy, addr + 4, parentBus);
uint32_t reserved = 0;
- port->writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
+ proxy->writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
return length;
}
@@ -434,12 +434,12 @@ X86IntelMPBusHierarchyParams::create()
Addr
X86ISA::IntelMP::CompatAddrSpaceMod::writeOut(
- FunctionalPort * port, Addr addr, uint8_t &checkSum)
+ PortProxy* proxy, Addr addr, uint8_t &checkSum)
{
- ExtConfigEntry::writeOut(port, addr, checkSum);
- checkSum += writeOutField(port, addr + 2, busID);
- checkSum += writeOutField(port, addr + 3, mod);
- checkSum += writeOutField(port, addr + 4, rangeList);
+ ExtConfigEntry::writeOut(proxy, addr, checkSum);
+ checkSum += writeOutField(proxy, addr + 2, busID);
+ checkSum += writeOutField(proxy, addr + 3, mod);
+ checkSum += writeOutField(proxy, addr + 4, rangeList);
return length;
}
diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh
index 117466b48..0ddb62b8d 100644
--- a/src/arch/x86/bios/intelmp.hh
+++ b/src/arch/x86/bios/intelmp.hh
@@ -51,7 +51,7 @@
#include "enums/X86IntelMPTriggerMode.hh"
#include "sim/sim_object.hh"
-class FunctionalPort;
+class PortProxy;
// Config entry types
class X86IntelMPBaseConfigEntryParams;
@@ -93,7 +93,7 @@ class FloatingPointer : public SimObject
public:
- Addr writeOut(FunctionalPort * port, Addr addr);
+ Addr writeOut(PortProxy* proxy, Addr addr);
Addr getTableAddr()
{
@@ -117,7 +117,7 @@ class BaseConfigEntry : public SimObject
public:
- virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
BaseConfigEntry(Params * p, uint8_t _type);
};
@@ -132,7 +132,7 @@ class ExtConfigEntry : public SimObject
public:
- virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length);
};
@@ -155,7 +155,7 @@ class ConfigTable : public SimObject
std::vector<ExtConfigEntry *> extEntries;
public:
- Addr writeOut(FunctionalPort * port, Addr addr);
+ Addr writeOut(PortProxy* proxy, Addr addr);
ConfigTable(Params * p);
};
@@ -172,7 +172,7 @@ class Processor : public BaseConfigEntry
uint32_t featureFlags;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
Processor(Params * p);
};
@@ -186,7 +186,7 @@ class Bus : public BaseConfigEntry
std::string busType;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
Bus(Params * p);
};
@@ -202,7 +202,7 @@ class IOAPIC : public BaseConfigEntry
uint32_t address;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
IOAPIC(Params * p);
};
@@ -221,7 +221,7 @@ class IntAssignment : public BaseConfigEntry
uint8_t destApicIntIn;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
IntAssignment(X86IntelMPBaseConfigEntryParams * p,
Enums::X86IntelMPInterruptType _interruptType,
@@ -269,7 +269,7 @@ class AddrSpaceMapping : public ExtConfigEntry
uint64_t addrLength;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
AddrSpaceMapping(Params * p);
};
@@ -284,7 +284,7 @@ class BusHierarchy : public ExtConfigEntry
uint8_t parentBus;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
BusHierarchy(Params * p);
};
@@ -299,7 +299,7 @@ class CompatAddrSpaceMod : public ExtConfigEntry
uint32_t rangeList;
public:
- Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+ Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
CompatAddrSpaceMod(Params * p);
};
diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc
index c9015df0f..a85ece1ec 100644
--- a/src/arch/x86/bios/smbios.cc
+++ b/src/arch/x86/bios/smbios.cc
@@ -43,7 +43,7 @@
#include "arch/x86/bios/smbios.hh"
#include "arch/x86/isa_traits.hh"
#include "base/types.hh"
-#include "mem/port.hh"
+#include "mem/port_proxy.hh"
#include "params/X86SMBiosBiosInformation.hh"
#include "params/X86SMBiosSMBiosStructure.hh"
#include "params/X86SMBiosSMBiosTable.hh"
@@ -74,15 +74,15 @@ composeBitVector(T vec)
}
uint16_t
-X86ISA::SMBios::SMBiosStructure::writeOut(FunctionalPort * port, Addr addr)
+X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy* proxy, Addr addr)
{
- port->writeBlob(addr, (uint8_t *)(&type), 1);
+ proxy->writeBlob(addr, (uint8_t *)(&type), 1);
uint8_t length = getLength();
- port->writeBlob(addr + 1, (uint8_t *)(&length), 1);
+ proxy->writeBlob(addr + 1, (uint8_t *)(&length), 1);
uint16_t handleGuest = X86ISA::htog(handle);
- port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
+ proxy->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
return length + getStringLength();
}
@@ -93,7 +93,7 @@ X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) :
void
X86ISA::SMBios::SMBiosStructure::writeOutStrings(
- FunctionalPort * port, Addr addr)
+ PortProxy* proxy, Addr addr)
{
std::vector<std::string>::iterator it;
Addr offset = 0;
@@ -103,16 +103,16 @@ X86ISA::SMBios::SMBiosStructure::writeOutStrings(
// If there are string fields but none of them are used, that's a
// special case which is handled by this if.
if (strings.size() == 0 && stringFields) {
- port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+ proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
offset++;
} else {
for (it = strings.begin(); it != strings.end(); it++) {
- port->writeBlob(addr + offset,
+ proxy->writeBlob(addr + offset,
(uint8_t *)it->c_str(), it->length() + 1);
offset += it->length() + 1;
}
}
- port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+ proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
}
int
@@ -172,32 +172,32 @@ X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) :
}
uint16_t
-X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
+X86ISA::SMBios::BiosInformation::writeOut(PortProxy* proxy, Addr addr)
{
- uint8_t size = SMBiosStructure::writeOut(port, addr);
+ uint8_t size = SMBiosStructure::writeOut(proxy, addr);
- port->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
- port->writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
+ proxy->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
+ proxy->writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
- port->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
+ proxy->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
- port->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
- port->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
+ proxy->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
+ proxy->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
uint64_t characteristicsGuest = X86ISA::htog(characteristics);
- port->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
+ proxy->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
uint16_t characteristicExtBytesGuest =
X86ISA::htog(characteristicExtBytes);
- port->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
+ proxy->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
- port->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
- port->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
- port->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
- port->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
+ proxy->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
+ proxy->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
+ proxy->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
+ proxy->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
- writeOutStrings(port, addr + getLength());
+ writeOutStrings(proxy, addr + getLength());
return size;
}
@@ -214,7 +214,7 @@ X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) :
}
void
-X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
+X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr,
Addr &headerSize, Addr &structSize)
{
headerSize = 0x1F;
@@ -224,26 +224,26 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
*/
uint8_t mainChecksum = 0;
- port->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
+ proxy->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
for (int i = 0; i < 4; i++)
mainChecksum += smbiosHeader.anchorString[i];
// The checksum goes here, but we're figuring it out as we go.
- port->writeBlob(addr + 0x5,
+ proxy->writeBlob(addr + 0x5,
(uint8_t *)(&smbiosHeader.entryPointLength), 1);
mainChecksum += smbiosHeader.entryPointLength;
- port->writeBlob(addr + 0x6,
+ proxy->writeBlob(addr + 0x6,
(uint8_t *)(&smbiosHeader.majorVersion), 1);
mainChecksum += smbiosHeader.majorVersion;
- port->writeBlob(addr + 0x7,
+ proxy->writeBlob(addr + 0x7,
(uint8_t *)(&smbiosHeader.minorVersion), 1);
mainChecksum += smbiosHeader.minorVersion;
// Maximum structure size goes here, but we'll figure it out later.
- port->writeBlob(addr + 0xA,
+ proxy->writeBlob(addr + 0xA,
(uint8_t *)(&smbiosHeader.entryPointRevision), 1);
mainChecksum += smbiosHeader.entryPointRevision;
- port->writeBlob(addr + 0xB,
+ proxy->writeBlob(addr + 0xB,
(uint8_t *)(&smbiosHeader.formattedArea), 5);
for (int i = 0; i < 5; i++)
mainChecksum += smbiosHeader.formattedArea[i];
@@ -253,7 +253,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
*/
uint8_t intChecksum = 0;
- port->writeBlob(addr + 0x10,
+ proxy->writeBlob(addr + 0x10,
(uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
for (int i = 0; i < 5; i++)
intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
@@ -263,20 +263,20 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
uint32_t tableAddrGuest =
X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
- port->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
+ proxy->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
for (int i = 0; i < 4; i++) {
intChecksum += tableAddrGuest;
tableAddrGuest >>= 8;
}
uint16_t numStructs = X86ISA::gtoh(structures.size());
- port->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
+ proxy->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
for (int i = 0; i < 2; i++) {
intChecksum += numStructs;
numStructs >>= 8;
}
- port->writeBlob(addr + 0x1E,
+ proxy->writeBlob(addr + 0x1E,
(uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
1);
intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
@@ -290,7 +290,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
uint16_t maxSize = 0;
std::vector<SMBiosStructure *>::iterator it;
for (it = structures.begin(); it != structures.end(); it++) {
- uint16_t size = (*it)->writeOut(port, base + offset);
+ uint16_t size = (*it)->writeOut(proxy, base + offset);
if (size > maxSize)
maxSize = size;
offset += size;
@@ -303,7 +303,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
*/
maxSize = X86ISA::htog(maxSize);
- port->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
+ proxy->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
for (int i = 0; i < 2; i++) {
mainChecksum += maxSize;
maxSize >>= 8;
@@ -311,7 +311,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
// Set the checksum
mainChecksum = -mainChecksum;
- port->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
+ proxy->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
/*
* Intermediate header
@@ -319,14 +319,14 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
uint16_t tableSize = offset;
tableSize = X86ISA::htog(tableSize);
- port->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
+ proxy->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
for (int i = 0; i < 2; i++) {
intChecksum += tableSize;
tableSize >>= 8;
}
intChecksum = -intChecksum;
- port->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
+ proxy->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
}
X86ISA::SMBios::BiosInformation *
diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh
index b9c35bd09..9fa6cd6dc 100644
--- a/src/arch/x86/bios/smbios.hh
+++ b/src/arch/x86/bios/smbios.hh
@@ -51,7 +51,7 @@
#include "enums/ExtCharacteristic.hh"
#include "sim/sim_object.hh"
-class FunctionalPort;
+class PortProxy;
class X86SMBiosBiosInformationParams;
class X86SMBiosSMBiosStructureParams;
class X86SMBiosSMBiosTableParams;
@@ -89,7 +89,7 @@ class SMBiosStructure : public SimObject
return 4;
}
- virtual uint16_t writeOut(FunctionalPort * port, Addr addr);
+ virtual uint16_t writeOut(PortProxy* proxy, Addr addr);
protected:
bool stringFields;
@@ -98,7 +98,7 @@ class SMBiosStructure : public SimObject
std::vector<std::string> strings;
- void writeOutStrings(FunctionalPort * port, Addr addr);
+ void writeOutStrings(PortProxy* proxy, Addr addr);
int getStringLength();
@@ -145,7 +145,7 @@ class BiosInformation : public SMBiosStructure
BiosInformation(Params * p);
uint8_t getLength() { return 0x18; }
- uint16_t writeOut(FunctionalPort * port, Addr addr);
+ uint16_t writeOut(PortProxy* proxy, Addr addr);
};
class SMBiosTable : public SimObject
@@ -223,7 +223,7 @@ class SMBiosTable : public SimObject
smbiosHeader.intermediateHeader.tableAddr = addr;
}
- void writeOut(FunctionalPort * port, Addr addr,
+ void writeOut(PortProxy* proxy, Addr addr,
Addr &headerSize, Addr &structSize);
};
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 28f1ac04d..612244f49 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -351,25 +351,27 @@ X86ISA::Interrupts::recvResponse(PacketPtr pkt)
}
-void
-X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+X86ISA::Interrupts::getAddrRanges()
{
- range_list.clear();
+ AddrRangeList ranges;
Range<Addr> range = RangeEx(x86LocalAPICAddress(initialApicId, 0),
x86LocalAPICAddress(initialApicId, 0) +
PageBytes);
- range_list.push_back(range);
+ ranges.push_back(range);
pioAddr = range.start;
+ return ranges;
}
-void
-X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
+AddrRangeList
+X86ISA::Interrupts::getIntAddrRange()
{
- range_list.clear();
- range_list.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
- x86InterruptAddress(initialApicId, 0) +
- PhysAddrAPICRangeSize));
+ AddrRangeList ranges;
+ ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
+ x86InterruptAddress(initialApicId, 0) +
+ PhysAddrAPICRangeSize));
+ return ranges;
}
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh
index 389eb4f42..8567b30f0 100644
--- a/src/arch/x86/interrupts.hh
+++ b/src/arch/x86/interrupts.hh
@@ -220,8 +220,8 @@ class Interrupts : public BasicPioDevice, IntDev
return entry.periodic;
}
- void addressRanges(AddrRangeList &range_list);
- void getIntAddrRange(AddrRangeList &range_list);
+ AddrRangeList getAddrRanges();
+ AddrRangeList getIntAddrRange();
Port *getPort(const std::string &if_name, int idx = -1)
{
diff --git a/src/arch/x86/linux/syscalls.cc b/src/arch/x86/linux/syscalls.cc
index 5ccb14394..c6faf391b 100644
--- a/src/arch/x86/linux/syscalls.cc
+++ b/src/arch/x86/linux/syscalls.cc
@@ -59,7 +59,7 @@ unameFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "x86_64");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
@@ -81,7 +81,7 @@ archPrctlFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
int code = process->getSyscallArg(tc, index);
uint64_t addr = process->getSyscallArg(tc, index);
uint64_t fsBase, gsBase;
- TranslatingPort *p = tc->getMemPort();
+ SETranslatingPortProxy* p = tc->getMemProxy();
switch(code)
{
//Each of these valid options should actually check addr.
@@ -149,10 +149,10 @@ setThreadArea32Func(SyscallDesc *desc, int callnum,
gdt(x86lp->gdtStart() + minTLSEntry * sizeof(uint64_t),
numTLSEntries * sizeof(uint64_t));
- if (!userDesc.copyIn(tc->getMemPort()))
+ if (!userDesc.copyIn(tc->getMemProxy()))
return -EFAULT;
- if (!gdt.copyIn(tc->getMemPort()))
+ if (!gdt.copyIn(tc->getMemProxy()))
panic("Failed to copy in GDT for %s.\n", desc->name);
if (userDesc->entry_number == (uint32_t)(-1)) {
@@ -204,9 +204,9 @@ setThreadArea32Func(SyscallDesc *desc, int callnum,
gdt[index] = (uint64_t)segDesc;
- if (!userDesc.copyOut(tc->getMemPort()))
+ if (!userDesc.copyOut(tc->getMemProxy()))
return -EFAULT;
- if (!gdt.copyOut(tc->getMemPort()))
+ if (!gdt.copyOut(tc->getMemProxy()))
panic("Failed to copy out GDT for %s.\n", desc->name);
return 0;
diff --git a/src/arch/x86/linux/system.cc b/src/arch/x86/linux/system.cc
index 104f93372..a933868d1 100644
--- a/src/arch/x86/linux/system.cc
+++ b/src/arch/x86/linux/system.cc
@@ -43,7 +43,7 @@
#include "arch/vtophys.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
-#include "mem/physical.hh"
+#include "mem/port_proxy.hh"
#include "params/LinuxX86System.hh"
#include "sim/byteswap.hh"
@@ -67,8 +67,8 @@ LinuxX86System::initState()
// The location of the real mode data structure.
const Addr realModeData = 0x90200;
- // A port to write to memory.
- FunctionalPort * physPort = threadContexts[0]->getPhysPort();
+ // A port proxy to write to memory.
+ PortProxy* physProxy = threadContexts[0]->getPhysProxy();
/*
* Deal with the command line stuff.
@@ -82,14 +82,14 @@ LinuxX86System::initState()
if (commandLine.length() + 1 > realModeData - commandLineBuff)
panic("Command line \"%s\" is longer than %d characters.\n",
commandLine, realModeData - commandLineBuff - 1);
- physPort->writeBlob(commandLineBuff,
+ physProxy->writeBlob(commandLineBuff,
(uint8_t *)commandLine.c_str(), commandLine.length() + 1);
// Generate a pointer of the right size and endianness to put into
// commandLinePointer.
uint32_t guestCommandLineBuff =
X86ISA::htog((uint32_t)commandLineBuff);
- physPort->writeBlob(commandLinePointer,
+ physProxy->writeBlob(commandLinePointer,
(uint8_t *)&guestCommandLineBuff, sizeof(guestCommandLineBuff));
/*
@@ -127,7 +127,7 @@ LinuxX86System::initState()
// A pointer to the buffer for E820 entries.
const Addr e820MapPointer = realModeData + 0x2d0;
- e820Table->writeTo(physPort, e820MapNrPointer, e820MapPointer);
+ e820Table->writeTo(getSystemPort(), e820MapNrPointer, e820MapPointer);
/*
* Pass the location of the real mode data structure to the kernel
diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc
index c80fe10fc..5b1730f0c 100644
--- a/src/arch/x86/pagetable_walker.cc
+++ b/src/arch/x86/pagetable_walker.cc
@@ -154,17 +154,8 @@ Walker::WalkerPort::recvFunctional(PacketPtr pkt)
}
void
-Walker::WalkerPort::recvStatusChange(Status status)
+Walker::WalkerPort::recvRangeChange()
{
- if (status == RangeChange) {
- if (!snoopRangeSent) {
- snoopRangeSent = true;
- sendStatusChange(Port::RangeChange);
- }
- return;
- }
-
- panic("Unexpected recvStatusChange.\n");
}
void
diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh
index b0edc434f..73e185148 100644
--- a/src/arch/x86/pagetable_walker.hh
+++ b/src/arch/x86/pagetable_walker.hh
@@ -63,26 +63,18 @@ namespace X86ISA
{
public:
WalkerPort(const std::string &_name, Walker * _walker) :
- Port(_name, _walker), walker(_walker),
- snoopRangeSent(false)
+ Port(_name, _walker), walker(_walker)
{}
protected:
Walker * walker;
- bool snoopRangeSent;
-
bool recvTiming(PacketPtr pkt);
Tick recvAtomic(PacketPtr pkt);
void recvFunctional(PacketPtr pkt);
- void recvStatusChange(Status status);
+ void recvRangeChange();
void recvRetry();
- void getDeviceAddressRanges(AddrRangeList &resp,
- bool &snoop)
- {
- resp.clear();
- snoop = true;
- }
+ bool isSnooping() { return true; }
};
friend class WalkerPort;
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index f5ba787c9..32fc8ca70 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -53,7 +53,6 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
-#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_emul.hh"
#include "sim/system.hh"
diff --git a/src/arch/x86/stacktrace.cc b/src/arch/x86/stacktrace.cc
index e2ec04fa7..e3d30d5cd 100644
--- a/src/arch/x86/stacktrace.cc
+++ b/src/arch/x86/stacktrace.cc
@@ -37,7 +37,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace std;
@@ -48,9 +48,9 @@ namespace X86ISA
{
Addr addr = 0;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
@@ -82,9 +82,9 @@ namespace X86ISA
Addr tsk;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
tsk = vp->readGtoH<Addr>(base + task_off);
return tsk;
@@ -99,9 +99,9 @@ namespace X86ISA
uint16_t pd;
- VirtualPort *vp;
+ FSTranslatingPortProxy* vp;
- vp = tc->getVirtPort();
+ vp = tc->getVirtProxy();
pd = vp->readGtoH<uint16_t>(task + pid_off);
return pd;
diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc
index d287e3947..ca13fd5ce 100644
--- a/src/arch/x86/system.cc
+++ b/src/arch/x86/system.cc
@@ -48,7 +48,7 @@
#include "base/intmath.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
-#include "mem/physical.hh"
+#include "mem/port_proxy.hh"
#include "params/X86System.hh"
#include "sim/byteswap.hh"
@@ -61,8 +61,6 @@ X86System::X86System(Params *p) :
mpConfigTable(p->intel_mp_table),
rsdp(p->acpi_description_table_pointer)
{
- if (kernel->getArch() == ObjectFile::I386)
- fatal("Loading a 32 bit x86 kernel is not supported.\n");
}
static void
@@ -116,6 +114,9 @@ X86System::initState()
{
System::initState();
+ if (kernel->getArch() == ObjectFile::I386)
+ fatal("Loading a 32 bit x86 kernel is not supported.\n");
+
ThreadContext *tc = threadContexts[0];
// This is the boot strap processor (BSP). Initialize it to look like
// the boot loader has just turned control over to the 64 bit OS. We
@@ -137,8 +138,8 @@ X86System::initState()
const int PDPTBits = 9;
const int PDTBits = 9;
- // Get a port to write the page tables and descriptor tables.
- FunctionalPort * physPort = tc->getPhysPort();
+ // Get a port proxy to write the page tables and descriptor tables.
+ PortProxy* physProxy = tc->getPhysProxy();
/*
* Set up the gdt.
@@ -146,7 +147,7 @@ X86System::initState()
uint8_t numGDTEntries = 0;
// Place holder at selector 0
uint64_t nullDescriptor = 0;
- physPort->writeBlob(GDTBase + numGDTEntries * 8,
+ physProxy->writeBlob(GDTBase + numGDTEntries * 8,
(uint8_t *)(&nullDescriptor), 8);
numGDTEntries++;
@@ -168,7 +169,7 @@ X86System::initState()
//it's beginning in memory and it's actual data, we'll use an
//intermediary.
uint64_t csDescVal = csDesc;
- physPort->writeBlob(GDTBase + numGDTEntries * 8,
+ physProxy->writeBlob(GDTBase + numGDTEntries * 8,
(uint8_t *)(&csDescVal), 8);
numGDTEntries++;
@@ -191,7 +192,7 @@ X86System::initState()
dsDesc.limitHigh = 0xF;
dsDesc.limitLow = 0xFF;
uint64_t dsDescVal = dsDesc;
- physPort->writeBlob(GDTBase + numGDTEntries * 8,
+ physProxy->writeBlob(GDTBase + numGDTEntries * 8,
(uint8_t *)(&dsDescVal), 8);
numGDTEntries++;
@@ -219,7 +220,7 @@ X86System::initState()
tssDesc.limitHigh = 0xF;
tssDesc.limitLow = 0xFF;
uint64_t tssDescVal = tssDesc;
- physPort->writeBlob(GDTBase + numGDTEntries * 8,
+ physProxy->writeBlob(GDTBase + numGDTEntries * 8,
(uint8_t *)(&tssDescVal), 8);
numGDTEntries++;
@@ -249,24 +250,24 @@ X86System::initState()
// read/write, user, not present
uint64_t pml4e = X86ISA::htog(0x6);
for (int offset = 0; offset < (1 << PML4Bits) * 8; offset += 8) {
- physPort->writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8);
+ physProxy->writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8);
}
// Point to the only PDPT
pml4e = X86ISA::htog(0x7 | PageDirPtrTable);
- physPort->writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8);
+ physProxy->writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8);
// Page Directory Pointer Table
// read/write, user, not present
uint64_t pdpe = X86ISA::htog(0x6);
for (int offset = 0; offset < (1 << PDPTBits) * 8; offset += 8) {
- physPort->writeBlob(PageDirPtrTable + offset,
+ physProxy->writeBlob(PageDirPtrTable + offset,
(uint8_t *)(&pdpe), 8);
}
// Point to the PDTs
for (int table = 0; table < NumPDTs; table++) {
pdpe = X86ISA::htog(0x7 | PageDirTable[table]);
- physPort->writeBlob(PageDirPtrTable + table * 8,
+ physProxy->writeBlob(PageDirPtrTable + table * 8,
(uint8_t *)(&pdpe), 8);
}
@@ -278,7 +279,7 @@ X86System::initState()
for (int offset = 0; offset < (1 << PDTBits) * 8; offset += 8) {
// read/write, user, present, 4MB
uint64_t pdte = X86ISA::htog(0x87 | base);
- physPort->writeBlob(PageDirTable[table] + offset,
+ physProxy->writeBlob(PageDirTable[table] + offset,
(uint8_t *)(&pdte), 8);
base += pageSize;
}
@@ -341,8 +342,8 @@ void
X86System::writeOutSMBiosTable(Addr header,
Addr &headerSize, Addr &structSize, Addr table)
{
- // Get a port to write the table and header to memory.
- FunctionalPort * physPort = threadContexts[0]->getPhysPort();
+ // Get a port proxy to write the table and header to memory.
+ PortProxy* physProxy = threadContexts[0]->getPhysProxy();
// If the table location isn't specified, just put it after the header.
// The header size as of the 2.5 SMBios specification is 0x1F bytes
@@ -350,7 +351,7 @@ X86System::writeOutSMBiosTable(Addr header,
table = header + 0x1F;
smbiosTable->setTableAddr(table);
- smbiosTable->writeOut(physPort, header, headerSize, structSize);
+ smbiosTable->writeOut(physProxy, header, headerSize, structSize);
// Do some bounds checking to make sure we at least didn't step on
// ourselves.
@@ -362,8 +363,8 @@ void
X86System::writeOutMPTable(Addr fp,
Addr &fpSize, Addr &tableSize, Addr table)
{
- // Get a port to write the table and header to memory.
- FunctionalPort * physPort = threadContexts[0]->getPhysPort();
+ // Get a port proxy to write the table and header to memory.
+ PortProxy* physProxy = threadContexts[0]->getPhysProxy();
// If the table location isn't specified and it exists, just put
// it after the floating pointer. The fp size as of the 1.4 Intel MP
@@ -374,9 +375,9 @@ X86System::writeOutMPTable(Addr fp,
mpFloatingPointer->setTableAddr(table);
}
- fpSize = mpFloatingPointer->writeOut(physPort, fp);
+ fpSize = mpFloatingPointer->writeOut(physProxy, fp);
if (mpConfigTable)
- tableSize = mpConfigTable->writeOut(physPort, table);
+ tableSize = mpConfigTable->writeOut(physProxy, table);
else
tableSize = 0;