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| author | seanzw <seanyukigeek@gmail.com> | 2019-11-01 10:34:31 -0700 |
|---|---|---|
| committer | ZHENGRONG WANG <seanzw@g.ucla.edu> | 2019-11-01 21:53:31 +0000 |
| commit | f97051aa4f031445cb8503a23f3de1218a9fc94f (patch) | |
| tree | d3d7d53399d5189e49f51f440d84ab93a0ae2678 /src/arch | |
| parent | 55eef302d49f28598e1284449e7cb4ee5987a3aa (diff) | |
| download | gem5-f97051aa4f031445cb8503a23f3de1218a9fc94f.tar.xz | |
arch-x86: Fix FLDCW_P and FNSTCW_P to use rip.
FLDCW_P and FNSTCW_P should use rip to compute address.
Change-Id: Ide7327e243d42bdd8791e43773385b2a79d45418
Signed-off-by: Zhengrong Wang <seanzw@ucla.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22483
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py b/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py index af465f014..1d2c4ba6a 100644 --- a/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py +++ b/src/arch/x86/isa/insts/x87/control/save_and_restore_x87_control_word.py @@ -43,7 +43,7 @@ def macroop FLDCW_M { }; def macroop FLDCW_P { - ld t1, seg, sib, disp, dataSize=2 + ld t1, seg, riprel, disp, dataSize=2 wrval fcw, t1 }; @@ -57,6 +57,6 @@ def macroop FNSTCW_M { def macroop FNSTCW_P { rdip t7 rdval t1, fcw - st t1, seg, sib, disp, dataSize=2 + st t1, seg, riprel, disp, dataSize=2 }; ''' |