Merge zizzer:/bk/newmem

into  zeep.pool:/z/saidi/work/m5.newmem.head

--HG--
extra : convert_revision : a64362d3cf8de00c97bea25118fee33cffe22707

1 files changed, 19 insertions, 3 deletions

diff --git a/src/base/traceflags.py b/src/base/traceflags.py
index 3b7dd0f81..327ce6075 100644
--- a/src/base/traceflags.py
+++ b/src/base/traceflags.py
@@ -25,6 +25,9 @@
 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+#          Steve Reinhardt
 
 #
 # This file generates the header and source files for the flags
@@ -53,6 +56,7 @@ baseFlags = [
     'BusBridge',
     'Cache',
     'Chains',
+    'Checker',
     'Clock',
     'Commit',
     'CommitRate',
@@ -103,14 +107,22 @@ baseFlags = [
     'IdeDisk',
     'InstExec',
     'Interrupt',
-    'LDSTQ',
+    'LSQ',
+    'LSQUnit',
     'Loader',
     'MC146818',
     'MMU',
     'MSHR',
     'Mbox',
     'MemDepUnit',
-    'OoOCPU',
+    'BaseCPU'
+    'O3CPU',
+    'OzoneCPU',
+    'FE',
+    'IBE',
+    'BE',
+    'O3CPU',
+    'OzoneLSQ',
     'PCEvent',
     'PCIA',
     'PCIDEV',
@@ -146,6 +158,9 @@ baseFlags = [
     'Uart',
     'VtoPhys',
     'WriteBarrier',
+    'Activity',
+    'Scoreboard',
+    'Writeback',
     ]
 
 #
@@ -163,7 +178,8 @@ compoundFlagMap = {
     'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
     'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
     'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
-    'FullCPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LDSTQ', 'StoreSet', 'MemDepUnit', 'DynInst', 'FullCPU']
+    'O3CPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit', 'DynInst', 'O3CPU', 'Activity','Scoreboard','Writeback'],
+    'OzoneCPUAll' : [ 'BE', 'FE', 'IBE', 'OzoneLSQ', 'OzoneCPU']
 }
 
 #############################################################