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authorTony Gutierrez <anthony.gutierrez@amd.com>2016-01-19 13:57:50 -0500
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-01-19 13:57:50 -0500
commitd658b6e1cc22de852fef611e28f448257acc298a (patch)
tree9d4ab8f7531647eb7df619c77e8ddb2ae1022bcf /src/base
parent34fb6b5e35db751f310aee824046107e57a0ba03 (diff)
downloadgem5-d658b6e1cc22de852fef611e28f448257acc298a.tar.xz
* * *
mem: support for gpu-style RMWs in ruby This patch adds support for GPU-style read-modify-write (RMW) operations in ruby. Such atomic operations are traditionally executed at the memory controller (instead of through an L1 cache using cache-line locking). Currently, this patch works by propogating operation functors through the memory system.
Diffstat (limited to 'src/base')
-rw-r--r--src/base/types.hh13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/base/types.hh b/src/base/types.hh
index bc5c715ce..7b115901a 100644
--- a/src/base/types.hh
+++ b/src/base/types.hh
@@ -200,6 +200,19 @@ typedef std::shared_ptr<FaultBase> Fault;
constexpr decltype(nullptr) NoFault = nullptr;
#endif
+struct AtomicOpFunctor
+{
+ virtual void operator()(uint8_t *p) = 0;
+ virtual ~AtomicOpFunctor() {}
+};
+
+template <class T>
+struct TypedAtomicOpFunctor : public AtomicOpFunctor
+{
+ void operator()(uint8_t *p) { execute((T *)p); }
+ virtual void execute(T * p) = 0;
+};
+
enum ByteOrder {
BigEndianByteOrder,
LittleEndianByteOrder