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| author | Vincentius Robby <acolyte@umich.edu> | 2007-05-31 16:01:41 -0400 |
|---|---|---|
| committer | Vincentius Robby <acolyte@umich.edu> | 2007-05-31 16:01:41 -0400 |
| commit | ecf1eb72489524c54897275c6ea314fe500c2b7d (patch) | |
| tree | 79fdd2c63f4b88bf3b81e5fd46d67bc87ec803d6 /src/base | |
| parent | 0193476ea790963884059c27d7fdd607a6f79019 (diff) | |
| download | gem5-ecf1eb72489524c54897275c6ea314fe500c2b7d.tar.xz | |
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/arch/sparc/miscregfile.cc:
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
Diffstat (limited to 'src/base')
0 files changed, 0 insertions, 0 deletions