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author | Gabe Black <gabeblack@google.com> | 2014-12-05 01:44:24 -0800 |
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committer | Gabe Black <gabeblack@google.com> | 2014-12-05 01:44:24 -0800 |
commit | fe48c0a32bf749358eeb95e748f9fc2247cc5480 (patch) | |
tree | 25e64817703c264bf09fa884db7eb187927870f7 /src/base | |
parent | 7540656fc5b8ce0cafb54f41b913a7e81cbfb4b3 (diff) | |
download | gem5-fe48c0a32bf749358eeb95e748f9fc2247cc5480.tar.xz |
misc: Make the GDB register cache accessible in various sized chunks.
Not all ISAs have 64 bit sized registers, so it's not always very convenient
to access the GDB register cache in 64 bit sized chunks. This change makes it
accessible in 8, 16, 32, or 64 bit chunks. The MIPS and ARM implementations
were working around that limitation by bundling and unbundling 32 bit values
into 64 bit values. That code has been removed.
Diffstat (limited to 'src/base')
-rw-r--r-- | src/base/remote_gdb.hh | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/src/base/remote_gdb.hh b/src/base/remote_gdb.hh index 8fab556f3..ef414f09b 100644 --- a/src/base/remote_gdb.hh +++ b/src/base/remote_gdb.hh @@ -1,4 +1,5 @@ /* + * Copyright 2014 Google, Inc. * Copyright (c) 2002-2005 The Regents of The University of Michigan * All rights reserved. * @@ -36,6 +37,7 @@ #include <map> #include "arch/types.hh" +#include "base/intmath.hh" #include "base/pollevent.hh" #include "base/socket.hh" #include "cpu/pc_event.hh" @@ -136,16 +138,25 @@ class BaseRemoteGDB class GdbRegCache { public: - GdbRegCache(size_t newSize) : regs(new uint64_t[newSize]), size(newSize) + GdbRegCache(size_t newSize) : + regs64(new uint64_t[divCeil(newSize, sizeof(uint64_t))]), + size(newSize) {} ~GdbRegCache() { - delete [] regs; + delete [] regs64; } - uint64_t * regs; + union { + uint64_t *regs64; + uint32_t *regs32; + uint16_t *regs16; + uint8_t *regs8; + void *regs; + }; + // Size of cache in bytes. size_t size; - size_t bytes() { return size * sizeof(uint64_t); } + size_t bytes() { return size; } }; GdbRegCache gdbregs; |