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authorAli Saidi <Ali.Saidi@ARM.com>2015-01-25 07:22:17 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2015-01-25 07:22:17 -0500
commit0bd986015b2de741dc741f10e5afeaf5d8890ba1 (patch)
treeb264b3fd434124d7b04eb4a6b337cb38e8ccb305 /src/cpu/BaseCPU.py
parent6c4a23c1c637d77f60df9516d0f36c71d12a2298 (diff)
downloadgem5-0bd986015b2de741dc741f10e5afeaf5d8890ba1.tar.xz
cpu: Put all CPU instruction tracers in a single file
Diffstat (limited to 'src/cpu/BaseCPU.py')
-rw-r--r--src/cpu/BaseCPU.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 8ba90209a..052df5702 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -49,7 +49,7 @@ from m5.proxy import *
from XBar import CoherentXBar
from InstTracer import InstTracer
-from ExeTracer import ExeTracer
+from CPUTracers import ExeTracer
from MemObject import MemObject
from ClockDomain import *