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| author | Dam Sunwoo <dam.sunwoo@arm.com> | 2013-04-22 13:20:31 -0400 |
|---|---|---|
| committer | Dam Sunwoo <dam.sunwoo@arm.com> | 2013-04-22 13:20:31 -0400 |
| commit | 2c1e34431326381833de289b1d90f2427ba16c98 (patch) | |
| tree | 2f1b7a0e9a400d5b5d660b4386d4b993cbd0e31c /src/cpu/BaseCPU.py | |
| parent | 121b15a54da77ef77e98ff59621e1c5b0f1f1f52 (diff) | |
| download | gem5-2c1e34431326381833de289b1d90f2427ba16c98.tar.xz | |
cpu: generate SimPoint basic block vector profiles
This patch is based on http://reviews.m5sim.org/r/1474/ originally written by
Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout
folder) based on start and end addresses of basic blocks.
Some comments to the original patch are addressed and hooks are added to create
and resume from checkpoints based on instruction counts dictated by external
SimPoint analysis tools.
SimPoint creation/resuming options will be implemented as a separate patch.
Diffstat (limited to 'src/cpu/BaseCPU.py')
| -rw-r--r-- | src/cpu/BaseCPU.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index 5e1a0a961..f47838e83 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -187,6 +187,8 @@ class BaseCPU(MemObject): "terminate when all threads have reached this inst count") max_insts_any_thread = Param.Counter(0, "terminate when any thread reaches this inst count") + simpoint_start_insts = VectorParam.Counter([], + "starting instruction counts of simpoints") max_loads_all_threads = Param.Counter(0, "terminate when all threads have reached this load count") max_loads_any_thread = Param.Counter(0, |