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| author | Jose Marinho <jose.marinho@arm.com> | 2017-06-28 11:09:13 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-12 12:29:32 +0000 |
| commit | c2baaab0ed43ad09fc8b7fcda25207b6ccd6c0e3 (patch) | |
| tree | 224509c2ab0f21168001ce5f14160eb61e09d9ce /src/cpu/BaseCPU.py | |
| parent | eef537fd993f7a879a44f5786bc528e03b0e61bc (diff) | |
| download | gem5-c2baaab0ed43ad09fc8b7fcda25207b6ccd6c0e3.tar.xz | |
cpu, sim: Add param to force CPUs to wait for GDB
By setting the BaseCPU parameter wait_for_dbg_connection, the GDB
server blocks during initialisation waiting for the remote debugger to
connect before starting the simulated CPU.
Change-Id: I4d62c68ce9adf69344bccbb44f66e30b33715a1c
[ Update info message to include remote GDB port, rename param. ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3963
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Diffstat (limited to 'src/cpu/BaseCPU.py')
| -rw-r--r-- | src/cpu/BaseCPU.py | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index 550ba62ac..fcae74207 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -151,6 +151,9 @@ class BaseCPU(MemObject): profile = Param.Latency('0ns', "trace the kernel stack") do_quiesce = Param.Bool(True, "enable quiesce instructions") + wait_for_remote_gdb = Param.Bool(False, + "Wait for a remote GDB connection"); + workload = VectorParam.Process([], "processes to run") if buildEnv['TARGET_ISA'] == 'sparc': |