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| author | Anouk Van Laer <anouk.vanlaer@arm.com> | 2017-03-17 12:02:00 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-11-20 11:03:03 +0000 |
| commit | c0d613adb4eca09c32aca1cc90f04c29574f69c6 (patch) | |
| tree | 1c2a0d26778d8b8ca3f0b359f990dc695156bf8f /src/cpu/BaseCPU.py | |
| parent | d626f4f7aaa4d2c9f7ae1afc35577fa025b4de38 (diff) | |
| download | gem5-c0d613adb4eca09c32aca1cc90f04c29574f69c6.tar.xz | |
pwr: Adds logic to enter power gating for the cpu model
If the CPU has been clock gated for a sufficient amount of time
(configurable via pwrGatingLatency), the CPU will go into the OFF
power state. This does not model hardware, just behaviour.
Change-Id: Ib3681d1ffa6ad25eba60f47b4020325f63472d43
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3969
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/BaseCPU.py')
| -rw-r--r-- | src/cpu/BaseCPU.py | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index fcae74207..0e131ae0a 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -1,4 +1,4 @@ -# Copyright (c) 2012-2013, 2015 ARM Limited +# Copyright (c) 2012-2013, 2015-2017 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -135,6 +135,8 @@ class BaseCPU(MemObject): cpu_id = Param.Int(-1, "CPU identifier") socket_id = Param.Unsigned(0, "Physical Socket identifier") numThreads = Param.Unsigned(1, "number of HW thread contexts") + pwr_gating_latency = Param.Cycles(300, + "Latency to enter power gating state when all contexts are suspended") function_trace = Param.Bool(False, "Enable function trace") function_trace_start = Param.Tick(0, "Tick to start function trace") |