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| author | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:45:12 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:45:12 -0700 |
| commit | 19df4e94ee4f2323e5fe1b915f7e81a6034cfc56 (patch) | |
| tree | ae0fbc2a53a90e022e91b00f028451759c2d270d /src/cpu/SConscript | |
| parent | 0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (diff) | |
| download | gem5-19df4e94ee4f2323e5fe1b915f7e81a6034cfc56.tar.xz | |
ISA,CPU: Generalize and split out the components of the decode cache.
This will allow it to be specialized by the ISAs. The existing caching scheme
is provided by the BasicDecodeCache in the GenericISA namespace and is built
from the generalized components.
--HG--
rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc
Diffstat (limited to 'src/cpu/SConscript')
| -rw-r--r-- | src/cpu/SConscript | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/SConscript b/src/cpu/SConscript index 4b327f8a1..e1ba59b8b 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -108,7 +108,6 @@ SimObject('NativeTrace.py') Source('activity.cc') Source('base.cc') Source('cpuevent.cc') -Source('decode_cache.cc') Source('exetrace.cc') Source('func_unit.cc') Source('inteltrace.cc') |